Systems and methods for test time outlier detection and correction in integrated circuit testing
View Patent ↗Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.
1. A method of semiconductor testing comprising:
while a test program is being applied to a semiconductor device, deciding that said device is testing too slowly and that based on a yield criterion said device is to be prevented from completing said test program; and
preventing said device from completing said test program;
wherein after said device has been prevented from completing said test program and if there is at least one remaining untested semiconductor device, said test program is applied to at least one of said remaining untested semiconductor devices.
2. The method of claim 1 , wherein said deciding includes:
checking whether the number of devices which tested too slowly and were previously designated for being prevented from completing said test program is less than a maximum allowed number of such devices, and
if less than said maximum, deciding that based on a yield criterion said device is to be prevented from completing said test program.
3. The method of claim 1 , wherein said deciding includes:
checking whether the number of devices which passed said test program is more than a predetermined minimum desired number of passing devices; and
if more than said minimum, deciding that based on a yield criterion said device is to be prevented from completing said test program.
4. The method of claim 1 , wherein said deciding includes:
checking whether the number of devices which were previously designated for being prevented from completing said test program for any reason is less than a maximum allowed number of such devices; and
if less than said maximum, deciding that based on a yield criterion said device is to be prevented from completing said test program.
5. The method of claim 1 , wherein said deciding includes:
checking whether at least two conditions apply selected from a group comprising: the number of devices which tested too slowly and were previously designated for being prevented from completing said test program is less than a maximum allowed number of such devices, the number of devices which passed said test program is more than a predetermined minimum desired number of passing devices, and the number of devices which were previously designated for being prevented from completing said test program for any reason is less than a maximum allowed number of such devices; and
if said at least two conditions apply, deciding that based on a yield criterion said device is to be prevented from completing said test program.
6. The method of claim 1 , further comprising:
customizing said yield criterion based on at least one test factory condition.
7. The method of claim 6 , wherein said customizing includes:
increasing a maximum number of devices allowed to be prevented from completing said test program because of testing too slowly in order to attempt to increase a number of devices on which said test program is applied in a predetermined time period.
8. The method of claim 6 , wherein said customizing includes:
decreasing a maximum number of devices allowed to be prevented from completing said test program because of testing too slowly in order to attempt to increase a number of devices which pass said test program.
9. The method of claim 1 , wherein said deciding includes: recognizing that said device is testing too slowly because at least one test time for applying at least one test in said test program to said device exceeds at least one maximum test time for said at least one test.
10. The method of claim 1 , wherein said deciding includes: recognizing that said device is testing too slowly based on data relating to a plurality of tests in said test program.
11. The method of claim 1 , wherein said deciding includes: recognizing that said device is testing too slowly because said device has not completed at least one test when a maximum test time for said at least one test has elapsed.
12. The method of claim 1 , wherein said deciding includes: recognizing that said device is testing too slowly compared to at least one other device being tested in parallel.
13. The method of claim 1 , wherein said test program is applied to said device at a separate time from any other device.
14. The method of claim 1 , wherein said test program is applied in parallel to said device and to at least one other device in a parallel group.
15. The method of claim 1 , wherein said device prevented from completing said test program is discarded.
16. The method of claim 1 , wherein said device prevented from completing said test program is retested at a later time.
17. The method of claim 1 , wherein said deciding includes: recognizing that said device is testing too slowly based on a customized value for a test time parameter.
18. A non-transitory computer program product comprising a non-transitory computer useable medium having computer readable program code embodied therein for semiconductor testing, the computer program product comprising:
computer readable program code for causing the computer, while a test program is being applied to a semiconductor device, to decide that said device is testing too slowly and that based on a yield criterion said device is to be prevented from completing said test program; and
computer readable program code for causing the computer to prevent said device from completing said test program;
wherein after said device has been prevented from completing said test program and if there is at least one remaining untested semiconductor device, said test program is applied to at least one of said remaining untested semiconductor devices.