P-channel LDMOS transistor and method of producing a p-channel LDMOS transistor

1. A p-channel LDMOS transistor, comprising:

a semiconductor substrate;

an n well of n-type conductivity in the substrate;

a p well of p-type conductivity in the n well, a portion of the n well being located under the p well;

a drain region of p-type conductivity in the p well;

a gate dielectric on the substrate;

a gate electrode on the gate dielectric;

a source region of p-type conductivity in the n well;

a body contact region of n-type conductivity in the n well;

a p implant region arranged in the n well under the p well in the vicinity of the p well, the p implant region locally compensating n-type dopants of the n well; and

a drift region located in the p well.

2. The LDMOS transistor of claim 1 , wherein the p implant region is adjacent to the p well.

3. The LDMOS transistor of claim 1 or 2 , further comprising:

a shallow n well in the n well, the source region and the body contact region being arranged in the shallow n well.

4. The LDMOS transistor of claim 3 , wherein the shallow n well is arranged at a distance from the p well.

5. The LDMOS transistor of claim 1 , wherein the p well, the gate electrode and the source region are arranged symmetrically with respect to the position of the drain region.

6. The LDMOS transistor of claim 1 , further comprising:

an isolation region embedded in the p well,

the isolation region being arranged above the drift region between the drain region and the source region.

7. The LDMOS transistor of claim 1 , further comprising:

an isolation region between the source region and the body contact region.