IP Library Granted Patent US 9,006,854
Granted Patent B2
US 9,006,854 · App. 13/819,559 · Granted Apr 14, 2015

Avalanche photodiode

Inventors: Tadao Ishibashi (Yokohama, JP); Seigo Ando (Yokohama, JP); Masahiro Nada (Atsugi, JP); Yoshifumi Muramoto (Atsugi, JP); Haruki Yokoyama (Atsugi, JP)
Assignees: NTT Electronics Corporation; Nippon Telegraph and Telephone Corporation
H01L31/02002H01L31/1075H01L31/022416
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Quick Facts
Patent No.
US 9,006,854
App. No.
13/819,559
Granted
Apr 14, 2015
Kind
B2
Abstract

An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outer circumference of the first mesa and encircling an outer circumference of the second mesa, and prevents the encircling portion of the p-type electric field control layer from being depleted when bias is applied.

Claims (5)

1. An avalanche photo diode comprising:

a semi-insulating substrate;

a first mesa comprising a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate; and

a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa;

wherein the n-type electric field control layer includes, in an encircling portion provided inside the outer circumference of the first mesa as viewed from the laminating direction and encircling the outer circumference of the second mesa, an inactivated donor for preventing the encircling portion of the p-type electric field control layer from being depleted when bias is applied.

Assignments (2)
CHANGE OF NAME Recorded Jan 23, 2026
From: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
To: NTT, INC.
Reel/Frame 073558/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2013
From: ISHIBASHI, TADAO; ANDO, SEIGO; NADA, MASAHIRO; MURAMOTO, YOSHIFUMI; YOKOYAMA, HARUKI
To: NTT ELECTRONICS CORPORATION; NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Reel/Frame 029887/0971 →
Priority Claims (1)
JP 2010-197156 · Sep 2, 2010 · national
Continuity (1)
Related Publication 20130168793A1 · Jul 4, 2013