IP Library › Granted Patent US 8,816,312
Granted Patent B2
US 8,816,312 · App. 13/824,098 · Granted Aug 26, 2014

Semiconductor device

Inventors: Munehiro Tada (Tokyo, JP); Makoto Miyamura (Tokyo, JP); Hiromitsu Hada (Tokyo, JP)
Assignee: NEC Corporation
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Quick Facts
Patent No.
US 8,816,312
App. No.
13/824,098
Granted
Aug 26, 2014
Kind
B2
Abstract

A semiconductor device according to the present invention includes: an unit element which includes a first switch and a second switch, wherein each of the first switch and the second switch includes an electrical resistance changing layer whose state of electrical resistance is changed according to a polarity of an applied voltage, and each of the first switch and the second switch has two electrodes, and wherein one electrode of the first switch and one electrode of the second switch are connected each other to form a common node, and the other electrode of the first switch forms a first node, and the other electrode of the second switch forms a second node; a first wiring which is connected with the first node and forms a signal transmission line; and a second wiring which is connected with the second node and is connected with the first wiring through the unit element.

Claims (55)

1. A semiconductor device, comprising:

an unit element which includes a first switch and a second switch, wherein

each of the first switch and the second switch includes an electrical resistance changing layer whose state of electrical resistance is changed corresponding to a polarity of an applied voltage, and each of the first switch and the second switch has two electrodes, and wherein

one electrode of the first switch and one electrode of the second switch are connected each other to form a common node, and the other electrode of the first switch forms a first node, and the other electrode of the second switch forms a second node;

a first wiring which is connected with the first node, and forms a signal transmission line; and

a second wiring which is connected with the second node, and is connected with the first wiring through the unit element.

2. The semiconductor device according to claim 1 , wherein

the first wiring and the second wiring are skewed each other.

3. The semiconductor device according to claim 1 , wherein

a plurality of wirings which include at least one of the first wiring and the second wiring are arranged, and a plurality of the unit elements are arranged correspondingly to the plural first wirings or the plural second wirings.

4. The semiconductor device according to claim 1 , wherein

the electrical resistance changing layer is an ion conductor which transits to any one of a state of high electrical resistance and a state of low electrical resistance corresponding to the polarity of the applied voltage;

one out of two electrodes is an active electrode which supplies a metal ion to the ion conductor; and

the other electrode is an inactive electrode which has an ionization tendency lower than the active electrode has.

5. The semiconductor device according to claim 1 , wherein

the common node is a connection point where the active electrodes are connected each other, or a connection point where the inactive electrodes are connected each other.

6. The semiconductor device according to claim 1 , further comprising:

a power supply connection control transistor which is connected with at least one of the first wiring and the second wiring, wherein

the power supply connection control transistor controls a state of connection between the power supply whose output voltages are applied to at least two node of the first node, the second node and the common node, and at least one wiring out of the first wiring and the second wiring, when making the first switch and the second switch transit to the state of electrical resistance.

7. The semiconductor device according to claim 1 , further comprising:

a signal unit connection control transistor which is connected with both a sending portion which transmits a signal through the first wiring and the second wiring or a receiving portion which receives the signal, and at least one wiring out of the first wiring and the second wiring, wherein

the signal unit connection control transistor controls a state of connection between the sending portion or the receiving portion, and at least one wiring of the first wiring and the second wiring, when making the first switch and the second switch transit to the state of electrical resistance.

8. The semiconductor device according to claim 7 , wherein

in the case that the power supply connection control transistor is a P type MIS transistor or a N type MIS transistor, the signal unit connection control transistor is the N type MIS transistor or the P type MIS transistor respectively.

9. The semiconductor device according to claim 1 , further comprising:

a common node electrical potential control transistor which controls a state of connection between the common node and the power supply which is used when making the first switch and the second switch transit to the state of the electrical resistance through applying voltages to at least two node of the first node, the second node and the common node.

10. The semiconductor device according to claim 1 , further comprising:

a bypass transistor which makes either the first switch or the second switch short-circuited so as to make the applied voltage reach directly either the second switch or the first switch which is in a state of non-short-circuit, when making the first switch and the second switch transit to the state of electrical resistance through applying voltages to at least two nodes of the first node, the second node and the common node.

11. The semiconductor device according to claim 9 , wherein

in the case that two kinds of voltages are applied, two common node electrical potential control transistors are used.

12. The semiconductor device according to claim 10 , further comprising:

a plurality of control lines for carrying out ON and OFF control to, at least, the power supply connection control transistor, the signal unit connection control transistor, the common node electrical potential control transistor and the bypass transistor, wherein

at least one control line of the plural control lines is arranged in non-parallel with the first wiring line or the second wiring line.

13. The semiconductor device according to claim 4 , wherein

the ion conductor of the first switch and the ion conductor of the second switch integrated.

14. The semiconductor device according to claim 4 , wherein

the ion conductor includes any one of an organic matter, organosiloxane, silicon carbide oxide, tantalum silicon oxide, tantalum oxide, zirconium oxide, hafnium oxide, silicon oxide and titanium oxide, wherein

the active electrode includes copper as a main component, and

the inactive electrode includes ruthenium or platinum.

15. The semiconductor device according to claim 4 , wherein

the ion conductor is formed through laminating a plurality of layers each of which includes the transition metal oxide.

16. The semiconductor device according to claim 15 , wherein

the transition metal oxide, comprising:

a first transition metal oxide film layer which includes titanium oxide or nickel oxide; and

a second transition metal oxide film which includes at least one of tantalum oxide, zirconium oxide, and hafnium oxide, wherein

the first transition metal oxide film comes into contact with the active electrode, and the second transition metal oxide film comes into contact with the inactive electrode.

17. The semiconductor device according to claim 4 , wherein

the active electrodes or the inactive electrodes of the first switch and the second switch, which are corresponding to the common node, are formed as a unite.

18. The semiconductor device according to claim 4 , wherein

the active electrode or the inactive electrode of the first switch, which is corresponding to the first node, is formed as a unite with the first wiring.

19. The semiconductor device according to claim 4 , wherein

the active electrode or the inactive electrode of the second switch, which is corresponding to the second node, is formed as a unite with the second wiring.

20. The semiconductor device according to claim 1 , wherein

the first wiring and the second wiring are formed in the same wiring layer of multi-layered wiring layers of the semiconductor device, and wherein

the first switch and the second switch are arranged in a layer which is just on or just under the layer in which the first wiring and the second wiring are arranged.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2021
From: NEC CORPORATION
To: NANOBRIDGE SEMICONDUCTOR, INC.
Reel/Frame 054913/0386 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2013
From: TADA, MUNEHIRO; MIYAMURA, MAKOTO; HADA, HIROMITSU
To: NEC CORPORATION
Reel/Frame 030049/0669 →
Priority Claims (2)
JP 2010-216732 · Sep 28, 2010 · national
JP 2011-162315 · Jul 25, 2011 · national
Continuity (1)
Related Publication 20130181180A1 · Jul 18, 2013