IP Library Granted Patent US 9,092,336
Granted Patent B2
US 9,092,336 · App. 13/832,843 · Granted Jul 28, 2015

Write admittance policy for a memory cache

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Quick Facts
Patent No.
US 9,092,336
App. No.
13/832,843
Granted
Jul 28, 2015
Kind
B2
Abstract

A method includes monitoring a number of read access requests to an address for data stored on a backing store. The method also includes comparing the number of read access requests to a read access threshold. The read access threshold includes a threshold number of read access requests for the address. The method also includes caching data corresponding to a write access request to the address in response to determining that the number of read access requests satisfies the read access threshold.

Claims (33)

1. A method, comprising:

monitoring a number of read access requests to an address for data stored on a backing store;

comparing the number of read access requests to a read access threshold, wherein the read access threshold comprises a threshold number of read access requests for the address; and

caching data corresponding to a write access request to the address in response to determining that the number of read access requests satisfies the read access threshold.

2. The method of claim 1 , further comprising adjusting a write admittance policy for the write access request to the address to one of a write-through policy and a write-back policy.

3. The method of claim 1 , further comprising excluding data associated with the write access request for the address from caching on a memory device in response to determining that the number of read access requests does not satisfy the read access threshold.

4. The method of claim 1 , further comprising adjusting a write admittance policy for the write access request to the address to a write-around policy in response to determining that the current number of read access requests does not satisfy the read access threshold.

5. The method of claim 1 , wherein the address comprises a logical address from a client application corresponding to the write access request, wherein the logical address corresponds to a physical address on the backing store.

6. The method of claim 1 , further comprising:

caching a portion of sequential data corresponding to the write access request for the address, wherein the portion comprises a data length up to a threshold number of addresses.

7. The method of claim 1 , wherein the number of read access requests corresponds to a group of addresses in which the address is located, wherein sequential read access requests to addresses in the group of addresses are counted as a single read access request for the number of read access requests.

8. The method of claim 1 , further comprising resetting the number of read access requests for the address to zero after a specified amount of time without receiving a read access request for the address.

9. The method of claim 8 , further comprising determining the specified amount of time based on an ageing-out policy for log pages associated with a memory device for caching.

10. The method of claim 1 , further comprising resetting the number of read access requests for the address to zero in response to evicting data stored at the address.

11. The method of claim 1 , further comprising resetting the number of read access requests for the address to zero in response to resetting a memory device on which a memory element corresponding to the address is located.

12. An apparatus, comprising:

a memory device configured to cache data corresponding to data on a non-volatile storage device; and

a storage manager configured to:

receive a write operation to write data on the non-volatile storage device, the write data associated with a set of addresses; and

caching the write data to the memory device in response to determining that a number of read counts for the set of addresses satisfies a read threshold.

13. The apparatus of claim 12 , wherein the storage manager is further configured to write the data to the non-volatile storage device according to a write-around policy in response to determining that the number of read counts for the set of addresses does not satisfy the read threshold.

14. The apparatus of claim 12 , wherein the storage manager is further configured to change a write admittance policy for caching data associated with a write access request for the set of addresses based on a comparison of the number of read counts to the read threshold.

15. The apparatus of claim 12 , further comprising:

caching a portion of sequential data corresponding to a write access request to the set of addresses, wherein the portion comprises a data length up to a threshold number of addresses.

16. The apparatus of claim 12 , wherein sequential read counts for the set of addresses are counted as a single read access request for the number of read access requests for the set of addresses.

17. The apparatus of claim 12 , wherein the storage manager is further configured to reset the number of read counts after a specified amount of time without receiving a read count for the set of addresses.

18. The apparatus of claim 12 , wherein the storage manager is further configured to reset the number of read counts to zero in response to evicting data stored at the address.

19. The apparatus of claim 12 , wherein the memory device comprises a plurality of storage tiers, wherein the method further comprises calculating a separate read threshold for each tier of the memory device.

20. A system, comprising:

means for writing data to a set of addresses;

means for calculating a threshold number of read access requests for the set of addresses;

means for storing a number of read access requests for the set of addresses; and

means for caching data being written to the set of addresses in response to determining that the number of read access requests for the set of addresses satisfies the threshold number of read access requests.

Assignments (9)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0898 →
RELEASE OF SECURITY INTEREST Recorded May 4, 2016
From: FUSION-IO, INC.
To: SANDISK CORPORATION
Reel/Frame 038748/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2016
From: PS12 LUXCO S.A.R.L.
To: LONGITUDE ENTERPRISE FLASH S.A.R.L.
Reel/Frame 038362/0604 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2016
From: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS 2 LLC
To: PS12 LUXCO S.A.R.L.
Reel/Frame 038362/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2016
From: LONGITUDE ENTERPRISE FLASH SARL
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 038324/0628 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2015
From: ATKISSON, DAVID
To: FUSION-IO, INC.
Reel/Frame 035358/0685 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2014
From: FUSION-IO, INC.
To: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS 2 LLC
Reel/Frame 033419/0748 →
SECURITY INTEREST Recorded Jul 24, 2014
From: INTELLIGENT INTELLECTUAL PROPERTY HOLDINGS 2 LLC
To: FUSION-IO, INC.
Reel/Frame 033410/0158 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2014
From: FUSION-IO, INC.
To: INTELLECTUAL PROPERTY HOLDINGS 2 LLC
Reel/Frame 033390/0566 →