Method and device for generating an exception
View Patent ↗A floating point value can represent a number or something that is not a number (NaN). A floating point value that is a NaN having data field that stores information, such as a propagation count that indicates the number of times a NaN value has been propagated through instructions. A NaN evaluation instruction can determine whether one or more operands is a NaN operand of a particular type, and if so can generate a result that is a NaN of a different type. An exception can be generated based upon the NaN of the different type being provided as a resultant.
1. A method comprising:
receiving an instruction at an execution unit of a data processor; and
providing a resultant that is a NaN of a first type in response to determining during execution that a first operand of the instruction is a NaN of a second type.
2. The method of claim 1 , wherein a first portion of the first operand identifies the first operand as a NaN of the second type, and providing the resultant that is a NaN of the first type includes generating the resultant by modifying only the first portion of the first operand.
3. The method of claim 2 , wherein the first portion is a specific single-bit location.
4. The method of claim 1 , wherein, NaNs of the second type, when resultants, do not result an exception being generated, and NaNs of the first type, when resultants, do result in an exception being generated.
5. The method of claim 1 , wherein:
the first operand comprises a data value at a first location; and
the resultant comprises the data value at a corresponding first location.
6. The method of claim 1 , wherein:
the first operand comprises a first data value at a first location; and
the resultant comprises a second data value at a corresponding first location that is computed as a function of the first data value that indicates a number of times a NaN operand has been propagated through an instruction.
7. The method of claim 1 , wherein the first operand is one of a plurality of operands of the instruction, and the resultant further comprises a data field that indicates that first operand was the NaN of the second type.
8. The method of claim 1 , wherein:
the first operand further comprises a first data value at a first location;
the instruction further comprises a second floating-point operand that is a NaN of the second type having a second data value at a corresponding first location; and
providing the resultant further comprises providing a resultant data value having a value that is based on a larger of the first data value and the second data value.
9. The method of claim 1 , further comprising:
in response to determining during execution that a second operand of the instruction is a NaN of the second type, providing a second resultant that is a NaN of the first type.
10. A processing device comprising:
a fetch unit to fetch an instruction; and
an execution unit to provide a NaN resultant of a first type in response to determining that a first operand of the instruction is a NaN of a second type.
11. The processing device of claim 10 , wherein the instruction is a floating-point instruction, the NaN of a first type is a NaN that results in an exception when generated, and the NaN of the second type is a NaN that does not result in an exception when generated.
12. The processing device of claim 10 , wherein the instruction includes a first portion that identifies the first operand as a NaN of the second type, and providing the resultant includes modifying the first portion of the first operand to generate a second operand of the first type, and providing the second operand as the resultant.
13. The device of claim 12 , wherein the first portion is a single bit location, wherein the modified operand varies from the first operand by a single bit.
14. The device of claim 10 , wherein the fetch unit is further to fetch a second instruction; and the execution unit is further to provide a non-NaN resultant in response to determining that a second operand of the second instruction is a NaN of the second type.
15. The device of claim 10 , wherein the operand comprises a first data value at a first location, and the resultant comprises a second data value at the first location, the second data value computed by incrementing the first data value.
16. The device of claim 10 , wherein the execution unit is further to provide a resultant that indicates which operand of the instruction, of a plurality of operands, is a NaN in response to exactly one operand being a NaN.
17. The device of claim 10 , wherein the execution unit is further to provide a resultant that indicates that all operands of the instruction are NaNs.
18. A method comprising:
receiving a first instruction at an execution unit of a data processor;
based on the instruction, providing a first floating-point NaN resultant that is a NaN of a type that does not cause an exception to be generated;
receiving a second instruction at the execution unit having the floating point NaN resultant as an operand, and
during execution of the second instruction, generating an exception event in response to determining that the operand is the floating-point NaN of the type that does not cause an exception to be generated.
19. The method of claim 18 , wherein execution of the second instruction does not generate a floating-point NaN resultant.
20. The method of claim 18 , wherein execution of the second instruction generates a floating-point NaN resultant that is of a type that causes the exception to be generated.