IP Library Granted Patent US 9,306,161
Granted Patent B1
US 9,306,161 · App. 13/845,922 · Granted Apr 5, 2016

Fabrication methods of conducting bridge random access memory (CBRAM) device structures

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Quick Facts
Patent No.
US 9,306,161
App. No.
13/845,922
Granted
Apr 5, 2016
Kind
B1
Abstract

A method of forming a conductive bridging memory cell can include forming an active electrode layer above a barrier layer formed on a lower conductive layer; forming at least one ion conductor layer over an active electrode layer; incorporating conductive ions into the ion conductor layer to create a switch memory layer that changes impedance in response to an electric field; and the active electrode layer is a source of conductive ions for the ion conductor, and the barrier layer substantially prevents a movement of conductive ions therethrough.

Claims (42)

1. A method of forming a conductive bridging memory cell, comprising:

forming an active electrode layer above a barrier layer formed on a lower conductive layer;

forming at least one ion conductor layer in contact with the active electrode layer;

incorporating conductive ions into the ion conductor layer to create a switch memory layer that changes impedance in response to an electric field; and

the active electrode layer is a source of conductive ions for the ion conductor layer, and the barrier layer substantially prevents a movement of conductive ions therethrough; wherein

incorporating conductive ions into the ion conductor layer includes a heat treatment having a ramp rate between 10° C./second and 1000° C./second that occurs in an inert gas environment, the inert gas environment being selected from the group of: argon and nitrogen.

2. The method of claim 1 , wherein:

incorporating conductive ions into the ion conductor layer includes

a) forming an ion conductor layer over a first electrode layer;

b) forming a conductive ion source layer different than the active electrode layer over the ion conductor layer;

c) repeating steps a)-b) until a first desired thickness is reached;

d) applying a treatment that causes the ion source layer material to be incorporated into the ion conductor layer to create the switch memory layer.

3. The method of claim 1 , wherein:

the heat treatment is in a temperature range of about 100° C. to 700° C. for a duration of about 1 second to 2 hours.

4. A method of forming a conductive bridging memory cell, comprising:

forming an active electrode layer above a barrier layer formed on a lower conductive layer;

forming at least one ion conductor layer in contact with the active electrode layer;

incorporating conductive ions into the ion conductor layer to create a switch memory layer that changes impedance in response to an electric field;

the active electrode layer is a source of conductive ions for the ion conductor layer, and the barrier layer substantially prevents a movement of conductive ions therethrough; and

altering an ion incorporation rate with respect to at least a first surface of the ion conductor layer.

5. The method of claim 4 , wherein:

altering the ion incorporation rate with respect to the first surface includes forming an ion incorporation inhibiting layer from a material different than the ion conductor layer between the first surface and a source of conductive ions.

6. The method of claim 5 , wherein:

the inhibiting layer is formed by techniques selected from the group of: plasma enhanced chemical vapor deposition (PECVD), metalorganic chemical vapor deposition (MOCVD), and atomic layer deposition (ALD).

7. The method of claim 5 , wherein:

the inhibiting layer has a thickness between 0.1 nm and 50 nm.

8. The method of claim 4 , wherein:

altering the ion incorporation rate with respect to the first surface includes altering a material density of at least a portion of the ion conductor layer.

9. A method, comprising:

forming an ion conductor layer in contact with a first ion source layer;

forming a second ion source layer in contact with the ion conductor layer and not in contact with the first ion source layer;

incorporating conductive ions into the ion conductor layer from both the first and second ion source layers to form a switch memory layer of a conductive bridging memory cell; and

removing at least a portion of the second ion source layer.

10. The method of claim 9 , wherein:

the first ion source layer is formed below the ion conductor layer;

the second ion source layer is formed over the ion conductor layer; and

removing at least a portion of the second ion source layer includes a planarization step that removes substantially all of the second ion source layer.

11. The method of claim 9 , wherein:

the first ion source layer is formed on a bottom and side surface of an opening in a dielectric layer; and

the ion conductor layer is formed within the opening.

12. The method of claim 9 , further including:

forming a barrier layer between the first ion source layer and a conductive layer that substantially prevents a movement of conductive ions therethrough.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Sep 24, 2019
From: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 050480/0836 →
RELEASE OF SECURITY INTEREST Recorded May 9, 2019
From: OPUS BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 049125/0970 →
SECURITY INTEREST Recorded May 8, 2018
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
Reel/Frame 046105/0731 →
SECURITY INTEREST Recorded May 22, 2015
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OPUS BANK
Reel/Frame 035754/0580 →