Self-formation of high-density arrays of nanostructures
View Patent ↗A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.
1. A method for forming nanostructures, comprising:
forming a crystalline semiconductor layer on a two-dimensional material of graphene that is directly present on a monocrystalline semiconductor substrate;
bonding a flexible substrate to the crystalline semiconductor layer having the two-dimensional material formed on a side opposite the flexible substrate;
removing the monocrystalline semiconductor substrate;
stressing the crystalline semiconductor layer in a first direction to initiate first cracks in the crystalline semiconductor layer;
propagating the first cracks through the crystalline semiconductor layer and through the two-dimensional material; and
releasing stress on the crystalline semiconductor layer to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.
2. The method as recited in claim 1 , wherein propagating cracks includes computing a strain corresponding with an intercrack distance and applying the strain to provide a dimension for the parallel structures that is equal to the intercrack distance.
3. The method as recited in claim 1 , wherein the crystalline semiconductor layer includes SiC.
4. The method as recited in claim 1 , further comprising:
bending the crystalline semiconductor layer in accordance with a second direction to initiate second cracks transversely to the first cracks;
propagating the second cracks through the crystalline semiconductor layer and through the two-dimensional material; and
releasing stress on the crystalline semiconductor layer to provide dot structures including the two-dimensional material on the crystalline semiconductor layer.
5. The method as recited in claim 1 , further comprising: forming an electronic or photonic device with the parallel structures.
6. The method as recited in claim 1 , further comprising:
forming at least two monolayers of a two-dimensional material on the monocrystalline semiconductor substrate;
epitaxially growing a crystalline semiconductor layer over the two-dimensional material; and
separating the substrate from the crystalline semiconductor layer, which is bonded to the flexible substrate by splitting the two dimensional material.
7. The method as recited in claim 1 , wherein stressing includes bending the crystalline semiconductor layer using a two point bend or over a radiused surface.
8. The method as recited in claim 1 , wherein propagating includes applying one or more of a temperature change, vibration, and increased stress.
9. A method for forming nanostructures, comprising:
providing a monocrystalline semiconductor substrate;
forming at least two monolayers of a two-dimensional material on the substrate, wherein at least one of the two monolayers of the two-dimensional material is comprised of graphene that is formed directly on the monocrystalline semiconductor substrate;
epitaxially growing a crystalline semiconductor layer over the two-dimensional material;
bonding a flexible substrate to the crystalline semiconductor layer;
separating the substrate from the crystalline semiconductor layer, which is bonded to the flexible substrate by splitting the two dimensional material;
stressing the crystalline semiconductor layer in a first direction to initiate first cracks in the crystalline semiconductor layer;
propagating the first cracks through the crystalline semiconductor layer and through the two-dimensional material; and
releasing stress on the crystalline semiconductor layer to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.
10. The method as recited in claim 9 , wherein propagating cracks includes computing a strain corresponding with an intercrack distance and applying the strain to provide a dimension for the parallel structures that is equal to the intercrack distance.
11. The method as recited in claim 9 , wherein the crystalline semiconductor layer includes SiC.
12. The method as recited in claim 9 , further comprising: forming an electronic or photonic device with the parallel structures.
13. The method as recited in claim 9 , further comprising:
bending the crystalline semiconductor layer in accordance with a second direction to initiate second cracks transversely to the first cracks;
propagating the second cracks through the crystalline semiconductor layer and through the two-dimensional material; and
releasing stress on the crystalline semiconductor layer to provide dot structures including the two-dimensional material on the crystalline semiconductor layer.
14. The method as recited in claim 9 , wherein stressing includes bending the crystalline semiconductor layer using a two point bend or over a radiused surface.
15. The method as recited in claim 9 , wherein propagating includes applying one or more of a temperature change, vibration, and increased stress.