IP Library Granted Patent US 8,940,602
Granted Patent B2
US 8,940,602 · App. 13/860,832 · Granted Jan 27, 2015

Self-aligned structure for bulk FinFET

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Quick Facts
Patent No.
US 8,940,602
App. No.
13/860,832
Granted
Jan 27, 2015
Kind
B2
Abstract

A FinFET structure which includes a bulk semiconductor substrate; semiconductor fins extending from the bulk semiconductor substrate, each of the semiconductor fins having a top portion and a bottom portion such that the bottom portion of the semiconductor fins is doped and the top portion of the semiconductor fins is undoped; a portion of the bulk semiconductor substrate directly underneath the plurality of semiconductor fins being doped to form an n+ or p+ well; and an oxide formed between the bottom portions of the fins. Also disclosed is a method for forming a FinFET device.

Claims (19)

1. A method of forming a FinFET device comprising, in the following order:

forming a plurality of semiconductor fins from a bulk semiconductor substrate;

forming an oxide layer between each of the plurality of semiconductor fins, the oxide layer extending from the bulk semiconductor substrate only part way up a sidewall of each of the semiconductor fins to cover a bottom portion of each of the semiconductor fins, a top portion of the sidewall of each of the semiconductor fins being exposed and not covered by the oxide layer;

forming a dummy spacer on the exposed top portion of each of the semiconductor fins;

completely stripping the oxide layer to expose the bulk semiconductor substrate and the bottom portion of each of the semiconductor fins;

depositing a doping material to be in contact with the exposed bulk semiconductor substrate and the bottom portion of each of the semiconductor fins previously covered by the oxide layer;

heat treating the bulk semiconductor substrate to drive in dopants from the doping material into the exposed bulk semiconductor substrate and the bottom portion of each of the semiconductor fins;

stripping only the doping material;

forming a second oxide layer only in contact with the exposed bulk semiconductor substrate and the bottom portion of each of the semiconductor fins previously contacted by the doping material; and

stripping the dummy spacer from each of the semiconductor fins.

2. The method of claim 1 wherein depositing a doping material is by epitaxial deposition.

3. The method of claim 2 wherein the doping material is phosphorous-silicon.

4. The method of claim 2 wherein the doping material is boron-silicon germanium or boron-silicon.

5. The method of claim 1 wherein depositing a doping material is by plasma deposition.

6. The method of claim 5 wherein the doping material is phosphorous.

7. The method of claim 5 wherein the doping material is boron.

8. The method of claim 1 wherein between completely stripping the oxide layer and depositing a doping material, further comprising thinning the exposed bottom portion of each of the semiconductor fins.

9. The method of claim 1 wherein the semiconductor fins and bulk semiconductor substrate are silicon.

10. The method of claim 1 further comprising forming a gate that wraps around at least one of the semiconductor fins.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2013
From: BASKER, VEERARAGHAVAN S.; LEOBANDUNG, EFFENDI; YAMASHITA, TENKO; YEH, CHUN-CHEN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 030196/0911 →