IP Library Granted Patent US 9,071,245
Granted Patent B2
US 9,071,245 · App. 13/869,516 · Granted Jun 30, 2015

Solid state power controller gate control

Inventors: Gregory I. Rozman (Rockford, IL); Steven J. Moss (Rockford, IL)
Assignee: Hamilton Sundstrand Corporation
H03K17/167
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Quick Facts
Patent No.
US 9,071,245
App. No.
13/869,516
Granted
Jun 30, 2015
Kind
B2
Abstract

A system for controlling gate power includes a metal oxide semiconductor field effect transistor (MOSFET) configured to supply power to a load according to a gate control voltage applied to a gate of the MOSFET. The system includes a gate control circuit configured to turn on and off the gate control voltage supplied to the gate of the MOSFET. The system also includes a ramping circuit configured to perform at least one of ramping up a voltage applied to the gate of the MOSFET based on the gate control circuit turning on power to the gate of the MOSFET and ramping down the voltage applied to the gate of the MOSFET based on the gate control circuit turning off power to the gate of the MOSFET.

Claims (29)

1. A system for controlling gate power, comprising:

a metal oxide semiconductor field effect transistor (MOSFET) configured to supply power to a load according to a gate control voltage applied to a gate of the MOSFET;

a gate control circuit configured to turn on and off the gate control voltage supplied to the gate of the MOSFET;

a ramping circuit configured to perform at least one of ramping up a voltage applied to the gate of the MOSFET based on the gate control circuit turning on power to the gate of the MOSFET and ramping down the voltage applied to the gate of the MOSFET based on the gate control circuit turning off power to the gate of the MOSFET; and

wherein the gate control circuit includes a first pulse transformer to provide power to a positive voltage gate rail and a second pulse transformer to provide power to a negative voltage gate rail.

2. The system of claim 1 , wherein the MOSFET is a silicon carbide (SiC) MOSFET.

3. A system for controlling gate power, comprising:

a metal oxide semiconductor field effect transistor (MOSFET) configured to supply power to a load according to a gate control voltage applied to a gate of the MOSFET;

a gate control circuit configured to turn on and off the gate control voltage supplied to the gate of the MOSFET;

a ramping circuit configured to perform at least one of ramping up a voltage applied to the gate of the MOSFET based on the gate control circuit turning on power to the gate of the MOSFET and ramping down the voltage applied to the gate of the MOSFET based on the gate control circuit turning off power to the gate of the MOSFET;

wherein the ramping circuit comprises:

a resistive voltage divider to provide a predetermined negative voltage;

a first Zener diode configure to protect the gate of the MOSFET from excessive negative voltage;

at least one second and at least one third Zener diode arranged in series between the negative voltage gate rail and a positive voltage gate rail; and

at least one switch having one end connected between the at least one second and at least one third Zener diodes, such that switching the at least one switch provides an incremental change in a voltage level, less than the full gate voltage, supplied to the gate of the MOSFET.

4. A method comprising:

controlling a gate drive circuit to provide power to a gate of a metal oxide semiconductor field effect transistor (MOSFET), the MOSFET configured to control the supply of power to a load;

controlling the power supplied to the gate of the MOSFET from the gate drive circuit to ramp the voltage level over time to the gate of the MOSFET; and

wherein controlling the power supplied to the gate of the MOSFET to ramp the voltage level over time includes switching at least one analog switch having one end connected between Zener diodes, the Zener diodes connected between a positive voltage rail and a negative voltage rail.

5. The method of claim 4 , wherein controlling the gate drive circuit to provide power to the gate includes providing a first voltage level to turn on the MOSFET, and

switching the at least one analog switch includes providing a first voltage level, greater than a voltage of the negative voltage rail and less than a voltage of the positive rail, to the gate of the MOSFET based the at least one analog switch being turned off, and providing the voltage of the positive voltage rail to the gate of the MOSFET based on the at least one analog switch being turned on.

6. The method of claim 4 , further comprising:

detecting a power characteristic of the load based on the first voltage level being provided to the gate of the MOSFET; and

controlling the gate drive circuit to turn off the power to the gate of the MOSFET based on detecting the load characteristic beyond a predetermined threshold.

7. The method of claim 6 , further comprising:

controlling the gate drive circuit to turn on the power to the gate of the MOSFET, after having turned off the power to the gate of the MOSFET based on detecting the load characteristic beyond the predetermined threshold, based on determining that a number of turn on/turn off cycles is less than a threshold number of cycles.

8. The method of claim 6 , further comprising:

determining whether a number of turn on/turn off cycles exceeds a threshold number of cycles; and

determining that the load is faulty based on determining that the number of turn on/turn off cycles exceeds the threshold number of cycles.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2013
From: ROZMAN, GREGORY I.; ROSS, STEVEN J.
To: HAMILTON SUNDSTRAND CORPORATION
Reel/Frame 030278/0868 →
Continuity (1)
Related Publication 20140320194A1 · Oct 30, 2014