Method of fabricating a FinFET device
View Patent ↗A method of forming a fin structure of a semiconductor device includes providing a substrate, creating a mandrel pattern over the substrate, depositing a first spacer layer over the mandrel pattern, and removing portions of the first spacer layer to form first spacer fins. The method also includes performing a first fin cut process to remove a subset of the first spacer fins, depositing a second spacer layer over the un-removed first spacer fins, and removing portions of the second spacer layer to form second spacer fins. The method further includes forming fin structures, and performing a second fin cut process to remove a subset of the fin structures.
1. A method of fabricating a semiconductor device, the method comprising:
receiving a substrate having a first dummy pattern;
depositing a first spacer layer over the first dummy pattern;
removing the first spacer layer, except from sidewalls of the first dummy pattern to form first spacer fins;
performing a first fin cut process to remove at least one of the first spacer fins;
after the first fin cut process, depositing a second spacer layer over the remaining first spacer fins;
removing the second spacer layer, except from sidewalls of the remaining first spacer fins;
after removing the second spacer layer, etching fin stacks using the remaining first spacer fins; and
performing a second fin cut process to modify some, but not all, of the fin stacks, thereby forming fin structures and dummy fins.
2. The method of claim 1 , further comprising forming an isolation structure over the substrate, wherein the isolation structure embeds the fin structures.
3. The method of claim 2 , wherein forming the isolation structure buries the dummy fins.
4. The method of claim 1 , wherein a location of a removed first spacer fin is positioned between a modified fin stack and an un-modified fin stack.
5. The method of claim 1 , wherein the step of receiving a substrate having a first dummy pattern includes receiving a substrate having a dummy mandrel pattern.
6. The method of claim 1 , wherein the substrate includes layers of silicon, amorphous carbon (APF), and silicon oxynitride.
7. The method of claim 5 , wherein patterns in the dummy mandrel pattern are larger than fins in the first plurality of spacer fins.
8. The method of claim 1 , wherein the second fin cut process results in a sequence of a modified fin stack, a space resulting from a removed spacer fin from the first plurality of spacer fins, and an unmodified fin stack.
9. The method of claim 7 , wherein the fin structures include layers of silicon, amorphous carbon (APF), and a capping layer.
10. The method of claim 9 , wherein the capping layer is silicon oxynitride.
11. A method of forming a semiconductor device, the method comprising:
receiving a substrate having a plurality of layers;
forming a dummy mandrel layer over the substrate, and a hard mask layer over the dummy mandrel layer;
forming hard mask patterns using the hard mask layer, wherein the hard mask patterns includes a first width D1;
depositing a first spacer layer over the hard mask patterns;
forming spacer fins including a second width D2 by using the hard mask patterns, wherein the second width D2 is less than the first width D1;
performing a first fin cut process to remove at least one of the spacer fins;
depositing a second spacer layer over the spacer fins, wherein a width of the spacer fins with the second spacer layer is a third width D3 such that D2<D3<D1;
performing an etching process to form fin stacks using the spacer fins; and
performing a second fin cut process to cut some, but not all, of the fin stacks.
12. The method of claim 11 , wherein the plurality of layers include silicon oxide, silicon nitride, silicon oxynitride layer, or combination thereof.
13. The method of claim 11 , wherein the fin stacks include silicon.
14. The method of claim 11 , wherein the hard mask layer includes silicon oxide, silicon nitride, silicon oxynitride layer, or combinations thereof.
15. The method of claim 11 , wherein the dummy mandrel layer includes silicon oxide, silicon nitride, silicon oxynitride, or combinations thereof.
16. The method of claim 11 , wherein the first spacer layer includes silicon oxide, silicon nitride, silicon oxynitride, or combinations thereof.
17. The method of claim 11 , wherein the dummy mandrel includes polysilicon, amorphous carbon, or photo resist, and wherein the second spacer layer includes silicon oxide, silicon nitride, or silicon oxynitride.
18. A method of fabricating a semiconductor device, the method comprising:
forming a first dummy pattern on a substrate;
forming first spacer fins from the first dummy pattern;
performing a first fin cut process to remove at least one of the first spacer fins;
after the first fin cut process, depositing a second spacer layer over the remaining first spacer fins;
removing the second spacer layer, except from sidewalls of the remaining first spacer fins;
after removing the second spacer layer, etching fin stacks using the remaining first spacer fins; and
performing a second fin cut process to modify some, but not all, of the fin stacks.
19. The method of claim 18 , wherein the substrate includes silicon, and wherein the first spacer fins include silicon.
20. The method of claim 18 , wherein the fin stacks include amorphous carbon and silicon oxynitride.