IP Library Granted Patent US 9,413,337
Granted Patent B2
US 9,413,337 · App. 13/873,964 · Granted Aug 9, 2016

Mixed-technology combination of programmable elements

Inventor: Arthur S. Morris, III (Raleigh, NC)
Assignee: WISPRY, INC.
H03J5/0209H01L23/5223H01L27/0688H01L28/60H01L2924/0002H03J2200/10Y10T29/49105
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Quick Facts
Patent No.
US 9,413,337
App. No.
13/873,964
Granted
Aug 9, 2016
Kind
B2
Abstract

The present subject matter relates to systems and methods for arranging and controlling programmable combinations of tuning elements in which more than one form of switching technology is combined in a single array. Specifically, such an array can include one or more first switchable elements including a first switching technology (e.g., one or more solid-state-controlled devices) and one or more second switchable elements including a second switching technology that is different than the first switching technology (e.g., one or more micro-electro-mechanical capacitors). The one or more first switchable elements and the one or more second switchable elements can be configured, however, to deliver a combined variable reactance.

Claims (39)

1. A programmable combination of tuning elements comprising:

one or more first elements configured to deliver a first variable reactance, the one or more first elements comprising one or more switches coupled to one or more fixed-state capacitors; and

one or more second elements configured to deliver a second variable reactance, the one or more second elements comprising one or more variable capacitors, wherein each of the one or more second elements comprises at least a first capacitive electrode that is movable with respect to a second capacitive electrode to change a capacitance between the first capacitive electrode and the second capacitive electrode;

wherein the first variable reactance of the one or more first elements and the second variable reactance of the one or more second elements deliver a combined variable reactance.

2. The programmable combination of tuning elements of claim 1 , wherein the one or more first elements comprise one or more solid-state-controlled devices; and

wherein the one or more second elements comprise one or more micro-electro-mechanical (MEMS) capacitors;

wherein the combined variable reactance comprises a combined variable capacitance.

3. The programmable combination of tuning elements of claim 2 , wherein the one or more solid-state-controlled devices are positioned beneath or above the one or more MEMS capacitors.

4. The programmable combination of tuning elements of claim 2 , wherein each of the one or more solid-state-controlled devices provides a capacitance tuning range that is less than a capacitance range of each of the one or more MEMS capacitors.

5. The programmable combination of tuning elements of claim 4 , wherein each of the one or more MEMS capacitors provides a capacitance tuning range of about 0.25 pF; and

wherein each of the one or more solid-state-controlled devices provides a capacitance tuning range of about 0.125 pF or less.

6. The programmable combination of tuning elements of claim 4 , wherein the one or more solid-state-controlled devices comprise a plurality of solid-state-controlled devices having different capacitance tuning ranges.

7. The programmable combination of tuning elements of claim 4 , wherein each of the one or more MEMS capacitors provides a first predetermined capacitance tuning range; and

wherein each of the one or more solid-state-controlled devices provides a capacitance tuning range less than or equal to about one-half (½) of the first predetermined capacitance tuning range.

8. The programmable combination of tuning elements of claim 7 , wherein the one or more solid-state-controlled devices define a binary set of capacitances, wherein each capacitor i of the one or more solid-state-controlled devices provides a capacitance tuning range of about

1

2

i

+

1

of the first predetermined capacitance range.

9. The programmable combination of tuning elements of claim 1 , wherein the one or more switches comprise complementary metal-oxide-semiconductor (CMOS) switches.

10. The programmable combination of tuning elements of claim 1 , wherein the one or more switches comprise silicon on insulator (SOI) or silicon on sapphire (SOS) switches.

11. The programmable combination of tuning elements of claim 1 , wherein each of the one of the one or more fixed-state capacitors comprises a metal-insulator-metal (MIM) capacitor or multi-layer generalization of a MIM capacitor.

12. The programmable combination of tuning elements of claim 1 , wherein the one or more first elements and the one or more second elements are arranged in a single monolithic semiconductor die.

13. A method for producing a programmable combination of tuning elements, the method comprising:

producing one or more first elements configured to deliver a first variable reactance, the one or more first elements comprising one or more switches coupled to one or more fixed-state capacitors; and

mounting one or more second elements on top of, below, or beside the one or more first elements, the one or more second elements configured to deliver a second variable reactance, the one or more second elements comprising one or more variable capacitors, wherein each of the one or more second elements comprises at least a first capacitive electrode that is movable with respect to a second capacitive electrode to change a capacitance between the first capacitive electrode and the second capacitive electrode;

wherein the first variable reactance of the one or more first elements and the second variable reactance of the one or more second elements deliver a combined variable reactance.

14. The method of claim 13 , where producing one or more first elements comprises producing one or more solid-state-controlled devices; and

wherein mounting one or more second elements on top of, below, or beside the one or more first elements comprises producing one or more micro-electro-mechanical (MEMS) capacitors.

15. The method of claim 13 , wherein producing one or more switches comprises producing complementary metal-oxide-semiconductor (CMOS) switches.

16. The method of claim 13 , wherein producing one or more switches comprises producing silicon on insulator (SOI) or silicon on sapphire (SOS) switches.

17. The method of claim 13 , wherein producing one or more fixed state capacitors comprises producing metal-insulator-metal (MIM) capacitors or multi-layer generalizations of a MIM capacitor.

18. A method for producing a programmable combination of tuning elements, the method comprising:

producing one or more first elements configured to deliver a first variable reactance and one or more second elements configured to deliver a second variable reactance in a single monolithic semiconductor die;

wherein the one or more first elements comprises one or more switches coupled to one or more fixed-state capacitors;

wherein the one or more second elements comprises one or more variable capacitors, wherein each of the one or more second elements comprises at least a first capacitive electrode that is movable with respect to a second capacitive electrode to change a capacitance between the first capacitive electrode and the second capacitive electrode;

wherein the first variable reactance of the one or more first elements and the second variable reactance of the one or more second elements deliver a combined variable reactance.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2022
From: WISPRY, INC.
To: AAC TECHNOLOGIES PTE. LTD.
Reel/Frame 059096/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2014
From: MORRIS, ARTHUR S., III
To: WISPRY, INC.
Reel/Frame 032490/0113 →
Continuity (2)
Provisional Application 61640556 · Apr 30, 2012
Related Publication 20130314175A1 · Nov 28, 2013