IP Library Granted Patent US 9,082,933
Granted Patent B2
US 9,082,933 · App. 13/881,252 · Granted Jul 14, 2015

Light emitting diode assembly and method for fabricating the same

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Quick Facts
Patent No.
US 9,082,933
App. No.
13/881,252
Granted
Jul 14, 2015
Kind
B2
Abstract

The present invention is directed to a light emitting diode (LED) assembly and a method for fabricating the same. According to the present invention, there is provided an LED assembly comprising an LED comprising at least an N-type semiconductor layer and a P-type semiconductor layer; and bumps provided on the LED and electrically connected to the semiconductor layers, wherein the bump comprises a first region made of a gold (Au) compound including tin (Sn) and a second region made of gold.

Claims (28)

1. A light emitting diode (LED) assembly, comprising:

an LED comprising an N-type semiconductor layer and a P-type semiconductor layer;

bumps disposed on the LED and electrically connected to the semiconductor layers;

electrode pads electrically connected to the semiconductor layers;

an N-pad disposed between the N-type semiconductor layer and a first bump among the bumps; and

a P-pad disposed between the P-type semiconductor layer and a second bump among the bumps,

wherein the bumps comprise a first region comprising gold (Au) and tin (Sn), a second region comprising gold, and a third region disposed between the first region and the second region, the third region comprising a diffusion barrier layer comprising nickel (Ni), and

wherein the first region contacts an electrode pad among the electrode pads, and the second region is disposed between the first region and a semiconductor layer among the semiconductor layers.

2. The LED assembly of claim 1 , wherein the electrode pad comprises gold and is bonded to the first region of a first bump among the bumps.

3. The LED assembly of claim 1 , wherein the N-pad and the P-pad are respectively bonded to the first and second bumps, and the N-type semiconductor layer and the P-type semiconductor layer are electrically connected to the first and second bumps through the N-pad and the P-pad, respectively.

4. The LED assembly of claim 1 , further comprising a first substrate and a second substrate, wherein the LED and the electrode pads are arranged between the first substrate and the second substrate.

5. The LED assembly of claim 4 , wherein the first substrate comprises a sapphire substrate, and the second substrate comprises an AIN substrate.

6. The LED assembly of claim 1 , wherein the bumps space the LED and the electrode pads apart from each other.

7. The LED assembly of claim 1 , wherein the gold compound comprises a mixture of 80 wt % gold and 20 wt % tin.

8. The LED assembly of claim 1 , wherein the LED comprises an ultraviolet LED configured to emit light having an ultraviolet wavelength.

9. The LED assembly of claim 8 , further comprising an active layer comprising AlGaN disposed between the N-type semiconductor layer and the P-type semiconductor layer, wherein the N-type semiconductor layer comprises n-AlGaN, and the P-type semiconductor layer comprises p-AlGaN.

10. The LED assembly of claim 1 , further comprising a reflecting member or reflecting film disposed on the electrode pads.

11. The LED assembly of claim 1 , wherein the second region consists of gold.

12. A light emitting diode (LED) chip, comprising:

a substrate;

an LED disposed on the substrate, the LED comprising an N-type semiconductor layer and a P-type semiconductor layer;

bumps disposed on the LED and electrically connected to the semiconductor layers;

electrode pads corresponding to the semiconductor layers;

an N-pad disposed between the N-type semiconductor layer and a first bump among the bumps; and

a P-pad disposed between the P-type semiconductor layer and a second bump among the bumps,

wherein the bumps comprise a first region comprising gold (Au) and tin (Sn), a second region comprising gold, and a third region disposed between the first region and the second region, the third region comprising a diffusion barrier layer comprising nickel (Ni), respectively, and

wherein the first region of a bump among the bumps comprises a portion at a first side thereof adjacent to an electrode pad among the electrode pads, and the second region of the bump comprises a portion at a second side thereof adjacent to a semiconductor layer among the semiconductor layers.

13. The LED chip of claim 12 , wherein the second region consists of gold.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: LEE, KYU HO; SUH, DAE WOONG; CHOI, JAE RYANG; KIM, CHANG HOON
To: SEOUL OPTO DEVICE CO., LTD.
Reel/Frame 035150/0497 →
CHANGE OF NAME Recorded Apr 21, 2014
From: SEOUL OPTO DEVICE CO., LTD
To: SEOUL VIOSYS CO., LTD
Reel/Frame 032723/0126 →