Field programmable analog array
In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and a summer configured to add outputs from the state variable filter engines.
1. A field programmable analog array (FPAA) comprising:
state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and
a summer configured to add outputs from the state variable filter engines.
2. The FPAA of claim 1 wherein the state variable filter engines comprise second-order state variable filters.
3. The FPAA of claim 1 wherein the state variable filter engines are implemented in at least one of 130 nm CMOS, 65 nm CMOS, 45 nm CMOS, and 22 nm CMOS.
4. The FPAA of claim 1 further including a digital controller configured to adjust integration and attenuation values of at least one of the state variable filter engines.
5. The FPAA of claim 1 in combination with a field programmable gate array.
6. A field programmable analog array (FPAA) comprising:
state variable filter engines arranged in series, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal.
7. The FPAA of claim 6 wherein the state variable filter engines comprise second-order state variable filters.
8. The FPAA of claim 6 wherein the state variable filter engines are implemented in at least one of 130 nm CMOS, 65 nm CMOS, 45 nm CMOS, and 22 nm CMOS.
9. The FPAA of claim 6 further including a digital controller configured to adjust integration and attenuation values of at least one of the state variable filter engines.
10. The FPAA of claim 6 in combination with a field programmable gate array.
11. A field programmable analog array (FPAA) comprising:
N×M attenuator matrices configured to operate on at least one wideband analog signal, each attenuator matrix including a plurality of variable attenuators, where K, M, and N, are positive integers; and
K variable integrators, each integrator operably coupled to each of the attenuator matrices and configured to integrate signals from at least one of the attenuator matrices.
12. The FPAA of claim 11 wherein M=1 and N=1 and the FPAA is a single-input single-output FPAA.
13. The FPAA of claim 11 wherein M>1 and N>1 and the FPAA is a multiple-input multiple-output FPAA.
14. The FPAA of claim 11 wherein the variable integrators are locally tuned.
15. The FPAA of claim 11 wherein the variable attenuators use randomization algorithms to create a finer range of values.
16. The FPAA of claim 11 wherein the state variable filter engines are implemented in at least one of 130 nm CMOS, 65 nm CMOS, 45 nm CMOS, and 22 nm CMOS.
17. The FPAA of claim 11 further including a digital controller configured to adjust integration and attenuation values of at least one of the state variable filter engines.
18. The FPAA of claim 11 in combination with a field programmable gate array.