IP Library Granted Patent US 9,960,079
Granted Patent B2
US 9,960,079 · App. 13/897,202 · Granted May 1, 2018

Passive within via

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Quick Facts
Patent No.
US 9,960,079
App. No.
13/897,202
Granted
May 1, 2018
Kind
B2
Abstract

A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

Claims (25)

1. A method comprising:

forming a via in a substrate to expose a first conductive layer in the substrate, wherein the via comprises at least one sidewall and a bottom forming an inner surface of the via and wherein the first conductive layer is exposed at the via bottom; and

forming at least a portion of an electrical component in the via in the substrate;

wherein forming at least a portion of an electrical component in the via includes:

depositing a first plate of conductive material on the inner surface of the via, such that the deposited first plate of conductive material resides only within the via and abuts the first conductive layer;

removing a portion of the deposited first plate of conductive material within the via to expose a portion of the at least one via sidewall and to expose a portion of the via bottom;

depositing a dielectric material onto the remaining portion of the first plate of conductive material and onto the inner surface of the via;

removing a portion of the dielectric material to expose another portion of the at least one via sidewall and to expose another portion of the via bottom; and

depositing a second plate of conductive material abutting the dielectric material and abutting the substrate.

2. The method of claim 1 wherein forming at least a portion of an electrical component in the via includes forming a capacitor.

3. The method of claim 1 wherein removing a portion of the deposited first plate of the conductive material includes etching.

4. The method of claim 1 wherein removing a portion of the dielectric material includes etching.

5. The method of claim 1 wherein the dielectric material provides an insulator between the first plate of conductive material and the second plate of conductive material.

6. The method of claim 1 further including depositing a dielectric portion in the via after depositing the second plate of conductive material abutting the dielectric material.

7. A method comprising:

forming a via in a substrate to expose a first conductive layer in the substrate, wherein the via comprises at least one sidewall and a bottom forming an inner surface of the via and wherein the first conductive layer is exposed at the via bottom;

depositing a first plate of conductive material on the inner surface of the via, such that the deposited first layer of conductive material resides only within the via and abuts the first conductive layer;

removing a portion of the deposited first plate of conductive material within the via to expose a portion of the at least one via sidewall and to expose a portion of the via bottom;

depositing a dielectric material onto the remaining portion of the first plate of conductive material and onto the inner surface of the via;

removing a portion of the dielectric material to expose another portion of the at least one via sidewall and to expose another portion of the via bottom; and

depositing a second plate of conductive material abutting the dielectric material and abutting the substrate.

8. The method of claim 7 wherein removing a portion of the deposited first plate of conductive material includes etching.

9. The method of claim 8 wherein removing a portion of the dielectric material includes etching.

10. The method of claim 8 wherein the dielectric material provides an insulator between the first plate of conductive material and the second plate of conductive layer material.

11. The method of claim 7 further including depositing a dielectric portion in the via after depositing the second plate of conductive material abutting the dielectric material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →