IP Library Granted Patent US 8,785,229
Granted Patent B1
US 8,785,229 · App. 13/898,999 · Granted Jul 22, 2014

Methods of forming micro-electromechanical resonators having passive temperature compensation regions therein

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Quick Facts
Patent No.
US 8,785,229
App. No.
13/898,999
Granted
Jul 22, 2014
Kind
B1
Abstract

Methods of forming micromechanical resonators include forming first and second substrates having first and second semiconductor layers of first and second conductivity type therein, respectively. The first semiconductor layer of first conductivity type is bonded to the second semiconductor layer of second conductivity type to thereby define a first rectifying junction at an interface of the bonded semiconductor layers. A piezoelectric layer is formed on the first rectifying junction and at least a first electrode is formed on the piezoelectric layer.

Claims (19)

1. A method of forming a periodic signal generator, comprising:

forming a microelectromechanical resonator comprising a suspended resonator body having at least two semiconductor layers therein of opposite conductivity type that form a P-N rectifying junction therebetween and a piezoelectric layer on the at least two semiconductor layers.

2. The method of claim 1 , wherein said forming comprises bonding the at least two semiconductor layers together to thereby define the P-N rectifying junction at a bonded interface between the at least two semiconductor layers.

3. The method of claim 2 , wherein said forming comprises bonding three or more semiconductor layers together to thereby define a plurality of space-apart P-N rectifying junctions at respective interfaces between the three or more semiconductor layers.

4. A method of forming a micromechanical resonator, comprising:

forming first and second substrates having first and second semiconductor layers of first and second conductivity type therein, respectively, said first substrate comprising a first buried electrically insulating layer therein;

bonding the first semiconductor layer of first conductivity type to the second semiconductor layer of second conductivity type to thereby define a first rectifying junction therebetween;

forming a piezoelectric layer on the first rectifying junction; and

forming at least a first electrode on the piezoelectric layer;

wherein said bonding is followed by removing the first buried electrically insulating layer to expose a surface of the first semiconductor layer; and wherein said forming a piezoelectric layer is preceded by bonding a third semiconductor layer of second conductivity type to the exposed surface of the first semiconductor layer to thereby define a second rectifying junction therebetween.

5. A method of forming a micromechanical resonator, comprising:

forming first and second substrates having first and second semiconductor layers of first and second conductivity type therein, respectively;

bonding the first semiconductor layer of first conductivity type to the second semiconductor layer of second conductivity type to thereby define a first rectifying junction therebetween;

forming a piezoelectric layer on the first rectifying junction; and

forming at least a first electrode on the piezoelectric layer.

6. The method of claim 5 , wherein the first substrate comprises a first electrically insulating temperature compensation layer therein; wherein said bonding is followed by removing a portion of the first substrate to expose the first electrically insulating temperature compensation layer; and wherein said forming a piezoelectric layer comprises forming a piezoelectric layer on the first electrically insulating temperature compensation layer.

7. The method of claim 5 , further comprising selectively etching the piezoelectric layer, the first semiconductor layer and the second semiconductor layer in sequence to define a resonator body comprising at least a portion of the first rectifying junction.

8. The method of claim 7 , wherein the second substrate comprises a second buried electrically insulating layer therein; and wherein said selectively etching comprises selectively etching the piezoelectric layer, the first semiconductor layer and the second semiconductor layer in sequence to expose the second buried electrically insulating layer.

9. The method of claim 8 , further comprising removing at least a portion of the exposed second buried electrically insulating layer to define a suspended resonator body.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →