Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration
View Patent ↗A programmable circuit includes a physical interface at an input output (IO) periphery of the programmable circuit. The programmable circuit also includes a partial reconfigurable (PR) module, at the IO periphery of the programmable circuit, to implement a sequencer unit operable to configure the physical interface during a first instance of the PR module, and a controller unit operable to translate commands to the physical interface during a second instance of the PR module.
1. A method for designing a system on a target device, the method comprising:
identifying a sequencer unit and a controller unit in a periphery device that operate at a different time, wherein the sequencer unit configures a physical interface and the controller unit translates commands to the physical interface; and
partitioning the sequencer unit and the controller unit on the periphery device such that the sequencer unit is implemented by a first instance of a partial reconfigurable (PR) module and the controller unit is implemented by a second instance of the PR module.
2. The method of claim 1 , wherein each of the first and second instances the PR module comprises a different circuit description of the PR module and each of the different circuit description interfaces with a same static logic.
3. The method of claim 1 further comprising:
synthesizing the system;
generating a floor plan for the system;
placing the system according to the floor plan on the target device; and
routing the system on the target device.
4. The method of claim 1 further comprising generating a reconfiguration control logic unit for the system operable to initiate the first instance and the second instance of the PR module.
5. The method of claim 4 , wherein the reconfiguration control logic unit operates in response to user input.
6. The method of claim 1 , wherein the PR module utilizes one or more resources on the target device to implement the sequencer unit in the first instance and to implement the controller unit in the second instance.
7. The method of claim 1 , wherein the controller unit occupies a location on the target device in the second instance of the PR module formerly occupied by the sequencer unit during the first instance of the PR module.
8. A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method comprising:
identifying a sequencer unit and a controller unit in a periphery device that operate at a different time, wherein the sequencer unit configures a physical interface and the controller unit translates commands to the physical interface; and
partitioning the sequencer unit and the controller unit on the periphery device such that the sequencer unit is implemented by a first instance of a partial reconfigurable (PR) module and the controller unit is implemented by a second instance of the PR module.
9. The non-transitory computer readable medium of claim 8 , wherein each of the first and second instances the PR module comprises a different circuit description of the PR module and each of the different circuit description interfaces with a same static logic.
10. The non-transitory computer readable medium of claim 9 , wherein the method further comprises:
synthesizing the system;
generating a floor plan for the system;
placing the system according to the floor plan on a target device; and
routing the system on the target device.
11. The non-transitory computer readable medium of claim 9 , wherein the method further comprises generating a reconfiguration control logic unit for the system operable to initiate the first instance and the second instance of the PR module.
12. The non-transitory computer readable medium of claim 11 , wherein the reconfiguration control logic unit operates in response to user input.
13. The non-transitory computer readable medium of claim 8 , wherein the PR module utilizes one or more resources on the target device to implement the sequencer unit in the first instance and to implement the controller unit in the second instance.
14. The non-transitory computer readable medium of claim 8 , wherein the controller unit occupies a location on the target device in the second instance of the PR module formerly occupied by the sequencer unit during the first instance of the PR module.
15. A system designer, comprising:
a component analyzer unit that identifies a sequencer unit and controller unit, in a periphery device on a system, that operate at a different time, wherein the sequencer unit configures a physical interface and the controller unit translates commands to the physical interface, and that partitions the sequencer unit and controller unit on the periphery device such that the sequencer unit is implemented by a first instance of a partial reconfigurable (PR) module and the controller unit is implemented by a second instance of the PR module.
16. The system designer of claim 15 further comprising:
a synthesis unit operable to synthesize the PR module with static modules;
a floor planning unit operable to generate a floor plan for the system on a target device;
a placement unit operable to place the system according to the floor plan on the target device; and
a routing unit operable to route the system on the target device.
17. The system designer of claim 15 , wherein each of the first and second instances the PR module comprises a different circuit description of the PR module and each of the different circuit description interfaces with a same static logic.
18. The system designer of claim 15 , wherein the synthesis unit is operable to generate a reconfiguration control logic unit for the system to initiate the first instance and the second instance of the PR module.
19. The system designer of claim 18 , wherein the reconfiguration control logic unit operates in response to user input.