IP Library › Granted Patent US 9,626,902
Granted Patent B2
US 9,626,902 · App. 13/903,831 · Granted Apr 18, 2017

Light emission driver for display device, display device and driving method thereof

Inventors: Tae-Hoon Kwon (Yongin, KR); Ji-Hyun Ka (Yongin, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233G09G2300/0819G09G2300/0842G09G2300/0861G09G2320/0223G09G2320/0233
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Quick Facts
Patent No.
US 9,626,902
App. No.
13/903,831
Granted
Apr 18, 2017
Kind
B2
Abstract

A light emission driver for a display device is disclosed. In one aspect, the driver includes a first node to which first and second light emitting power source voltages are applied according to respective clock signals. The driver also includes a second node to which the first and third light emitting power source voltages are applied according to the respective clock signals. The driver further includes first and second transistors respectively turned on by the first and second nodes and respectively transmitting the second and first light emitting power source voltages to a light emitting signal output terminal, respectively.

Claims (26)

1. A light emission driver for a display device comprising:

a plurality of light emitting driving blocks,

wherein each of the light emitting driving blocks is configured to receive first, second and third light emitting power source voltages and comprises:

a first node to which the second light emitting power source voltage is applied according to a first clock signal input to a first clock signal input terminal and the first light emitting power source voltage is applied according to a second clock signal input to a second clock signal input terminal;

a second node to which the first light emitting power source voltage is applied according to the first clock signal and the third light emitting power source voltage is applied according to the second clock signal, wherein the second node is electrically connected to a reverse light emitting signal output terminal;

a first transistor configured to be turned on by the first node and configured to transmit the second light emitting power source voltage to a light emitting signal output terminal;

a second transistor configured to be turned on by the second node and configured to transmit the first light emitting power source voltage to the light emitting signal output terminal;

a third transistor including a gate electrode electrically connected to the first node, a first electrode electrically connected to the first light emitting power source voltage, and a second electrode electrically connected to the second node;

a third node to which a third clock signal input to the second clock signal input terminal is applied according to a relay signal applied to a sequential input terminal from the previously arranged light emitting driving block and a fourth clock signal input to the first clock signal input terminal; and

a fourth transistor including 1) a gate electrode electrically connected to the third node, 2) a first electrode electrically connected to the third light emitting power source voltage, and 3) a second electrode electrically connected to the second node,

wherein the third light emitting power source voltage is different from the first and second light emitting power source voltages and is configured to drive reverse light emitting signals to be output to the reverse light emitting signal output terminal, and

wherein the second node is electrically connected to a relay signal output terminal configured to output a relay signal applied to a sequential input terminal of the next light emitting driving block.

2. The light emission driver for the display device of claim 1 , further comprising a fifth transistor including 1) a gate electrode electrically connected to the first clock signal input terminal, 2) a first electrode electrically connected to the second light emitting power source voltage, and 3) a second electrode electrically connected to the first node.

3. The light emission driver for the display device of claim 2 , further comprising:

a sixth transistor including a gate electrode electrically connected to the third node and a first electrode electrically connected to the first light emitting power source voltage; and

a seventh transistor including a gate electrode electrically connected to the third node, a first electrode electrically connected to a second electrode of the sixth transistor, and a second electrode electrically connected to the first node.

4. The light emission driver for the display device of claim 3 , further comprising:

a fourth node to which a relay signal input to the sequential input terminal according to a fifth clock signal input to the first clock signal input terminal is transmitted; and

a ninth transistor including a gate electrode electrically connected to the fourth node, a first electrode electrically connected to the second clock signal input terminal, and a second electrode electrically connected to the third node.

5. The light emission driver for the display device of claim 4 , further comprising a tenth transistor including a gate electrode electrically connected to the first clock signal input terminal, a first electrode electrically connected to the first light emitting power source voltage, and a second electrode electrically connected to the third node.

6. The light emission driver for the display device of claim 5 , further comprising an eleventh transistor including a gate electrode electrically connected to the first clock signal input terminal, a first electrode electrically connected to the sequential input terminal, and a second electrode electrically connected to the fourth node.

7. The light emission driver for the display device of claim 6 , wherein the light emitting driving blocks are configured to substantially simultaneously output the first light emitting power source voltage to the light emitting signal output terminal according to an entire reset signal input to an entire reset signal input terminal, and substantially simultaneously output the third light emitting power source voltage to the reverse light emitting signal output terminal and the relay signal output terminal.

8. The light emission driver for the display device of claim 7 , further comprising an eighth transistor including a gate electrode electrically connected to the entire reset signal input terminal, a first electrode electrically connected to the second light emitting power source voltage, and a second electrode electrically connected to the third node.

9. The light emission driver for the display device of claim 8 , further comprising a twelfth transistor including a gate electrode electrically connected to the entire reset signal input terminal, a first electrode electrically connected to the first light emitting power source voltage, and a second electrode electrically connected to the fourth node.

10. The light emission driver for the display device of claim 9 , further comprising a thirteenth transistor including a gate electrode electrically connected to the entire reset signal input terminal, a first electrode electrically connected to the first light emitting power source voltage, and a second electrode electrically connected to the light emitting signal output terminal.

11. The light emission driver for the display device of claim 10 , wherein at least one of the first to thirteenth transistors is an oxide thin film transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2013
From: KWON, TAE-HOON; KA, JI-HYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 030509/0644 →
Priority Claims (1)
KR 10-2012-0116034 · Oct 18, 2012 · national
Continuity (1)
Related Publication 20140111503A1 · Apr 24, 2014