Pixel structure
A pixel structure including a semiconductor layer having at least one source region and at least one drain region; a first insulating layer covering the semiconductor layer; a first conductive layer on the first insulating layer and including at least one gate; a second insulating layer covering the first conductive layer; a second conductive layer on the second insulating layer and including at least one source electrode, at least one drain electrode and at least one bottom electrode, the source region, the source electrode, the drain region, the drain electrode and the gate forming at least one thin film transistor; a third insulating layer covering the second conductive layer; a third conductive layer on the third insulating layer and including at least one top electrode, the top electrode and the bottom electrode forming at least one capacitor; and a pixel electrode electrically connected to the thin film transistor.
1. A pixel structure, comprising:
a semiconductor layer, comprising at least one source region, at least one drain region, at least one channel region and at least one first electrode;
a first insulating layer, covering the semiconductor layer;
a first conductive layer, disposed on the first insulating layer and comprising at least one gate and at least one second electrode, wherein the at least one gate is disposed above the at least one channel region, and the at least one second electrode is disposed above the at least one first electrode;
a second insulating layer, covering the first conductive layer;
a second conductive layer, disposed on the second insulating layer and comprising at least one third electrode located above the at least one second electrode, wherein the at least one first electrode of the semiconductor layer, the at least one second electrode of the first conductive layer and the at least one third electrode of the second conductive layer form at least one capacitor;
a third insulating layer, covering the second conductive layer;
a third conductive layer, disposed on the third insulating layer and comprising at least one source electrode and at least one drain electrode, wherein the at least one source electrode and the at least one drain electrode are electrically connected to the at least one source region and the at least one drain region of the semiconductor layer, respectively, and the at least one source region, the at least one source electrode, the at least one drain region, the at least one drain electrode, the at least one channel and the at least one gate form at least one thin film transistor;
a pixel electrode, electrically connected to the at least one thin film transistor;
a light emitting region defining layer, disposed on the pixel electrode and having an opening exposing the pixel electrode;
a light emitting layer, disposed on the pixel electrode exposed by the opening; and
an electrode layer, disposed on the light emitting layer.
2. The pixel structure as claimed in claim 1 , further comprising a planarization layer covering the third conductive layer, and the pixel electrode is disposed on the planarization layer.
3. The pixel structure as claimed in claim 1 , wherein the at least one thin film transistor comprises six thin film transistors.