IP Library Granted Patent US 9,054,239
Granted Patent B2
US 9,054,239 · App. 13/917,753 · Granted Jun 9, 2015

Process of forming a grid electrode on the front-side of a silicon wafer

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Quick Facts
Patent No.
US 9,054,239
App. No.
13/917,753
Granted
Jun 9, 2015
Kind
B2
Abstract

A process of forming a front-grid electrode on a silicon wafer having an ARC layer, comprising the steps: (1) printing and drying a metal paste A comprising an inorganic content comprising 0.5 to 8 wt.-% of glass frit and having fire-through capability, wherein the metal paste A is printed on the ARC layer to form a bottom set of thin parallel finger lines, (2) printing and drying a metal paste B comprising an inorganic content comprising 0.2 to 3 wt.-% of glass frit over the bottom set of finger lines, wherein the metal paste B is printed in a grid pattern which comprises (i) thin parallel finger lines forming a top set of finger lines superimposing the bottom set of finger lines and (ii) busbars intersecting the finger lines at right angle, and (3) firing the double-printed silicon wafer, wherein the inorganic content of metal paste B contains less glass frit plus optionally present other inorganic additives than the inorganic content of metal paste A.

Claims (25)

1. A grid electrode formed on the front-side of a silicon wafer which has a p-type region, an n-type region, a p-n junction and an antireflective coating (ARC) layer on said front-side, wherein said grid electrode is produced according to a process comprising the steps of:

(1) printing and drying a metal paste A having fire-through capability on the ARC layer, wherein the metal paste A is printed as thin parallel finger lines forming a bottom set of finger lines,

(2) printing and drying a metal paste B over the bottom set of finger lines,

wherein the metal paste B is printed in a grid pattern which comprises (i) thin parallel finger lines forming a top set of finger lines superimposing the bottom set of finger lines and (ii) two or more parallel busbars intersecting the finger lines at right angle, and

(3) firing the double-printed silicon wafer,

wherein the metal paste A comprises an organic vehicle and an inorganic content comprising (a1) at least one electrically conductive metal powder selected from the group consisting of silver, copper and nickel, and (a2) 0.5 to 8 wt.-% of glass frit,

wherein the metal paste B comprises an organic vehicle and an inorganic content comprising (b1) at least one electrically conductive metal powder selected from the group consisting of silver, copper and nickel, and (b2) 0.2 to 3 wt.-% of glass frit, and

wherein the inorganic content of metal paste B contains less glass frit plus optionally present other inorganic additives than the inorganic content of metal paste A, and said two or more parallel busbars comprising metal paste B do not etch the ARC layer during firing.

2. A silicon solar cell comprising a silicon wafer having an ARC layer on its front-side and the grid electrode of claim 1 .

3. The grid electrode of claim 1 , wherein the total content of the electrically conductive metal powder in metal paste A is 50 to 92 wt.-%.

4. The grid electrode of claim 1 , wherein the total content of the electrically conductive metal powder in metal paste B is 50 to 92 wt.-%.

5. The grid electrode of claim 1 , wherein the at least one electrically conductive metal powder in metal paste A is silver powder.

6. The grid electrode of claim 1 , wherein the at least one electrically conductive metal powder in metal paste B is silver powder.

7. The grid electrode of claim 1 , wherein the glass frit contained in metal paste B consists of at least one glass frit selected from the group consisting of (i) lead-containing glass frits with a softening point temperature in the range of 571 to 636° C. and containing 53 to 57 wt.-% of PbO, 25 to 29 wt.-% of SiO 2 , 2 to 6 wt.-% of Al 2 O 3 and 6 to 9 wt.-% of B 2 O 3 , (ii) lead-free glass frits with a softening point temperature in the range of 550 to 611° C. and containing 11 to 33 wt.-% of SiO 2 , >0 to 7 wt.-% of Al 2 O 3 and 2 to 10 wt.-% of B 2 O 3 , and (iii) lead-free glass frits with a softening point temperature in the range of 550 to 611° C. and containing 40 to 73 wt.-% of Bi 2 O 3 , 11 to 33 wt-% of SiO 2 , >0 to 7 wt.-% of Al 2 O 3 and 2 to 10 wt.-% of B 2 O 3 .

8. The grid electrode of claim 1 , wherein the ARC layer is selected from the group consisting of TiO x , SiO x , TiO x /SiO x , SiN x or Si 3 N 4 ARC layers.

9. The grid electrode of claim 1 , wherein an additional firing step (1a) is performed between steps (1) and (2).

10. A silicon wafer having a double printed grid electrode on the front-side wherein the silicon wafer has a p-type region, an n-type region, a p-n junction and an antireflective coating (ARC) layer on said front-side, and said grid electrode comprises:

(1) a metal paste A having fire-through capability printed and dried on the ARC layer as a bottom set of thin parallel finger lines,

(2) a metal paste B printed and dried over the bottom set of finger lines in a grid pattern which comprises (i) thin parallel finger lines forming a top set of finger lines superimposing the bottom set of finger lines and (ii) two or more parallel busbars intersecting the finger lines at right angle,

wherein the metal paste A comprises an organic vehicle and an inorganic content comprising (a1) at least one electrically conductive metal powder selected from the group consisting of silver, copper and nickel, and (a2) 0.5 to 8 wt.-% of glass frit,

wherein the metal paste B comprises an organic vehicle and an inorganic content comprising (b1) at least one electrically conductive metal powder selected from the group consisting of silver, copper and nickel, and (b2) 0.2 to 3 wt.-% of glass frit, and

wherein said two or more parallel busbars comprising metal paste B upon firing do not etch the ARC layer.

11. The silicon wafer of claim 10 wherein the inorganic content of metal paste B contains less glass frit plus optionally present other inorganic additives than the inorganic content of metal paste A.

12. A silicon solar cell comprising the silicon wafer of claim 10 .

13. The grid electrode of claim 10 , wherein the printing in steps (1) and (2) is screen printing.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2021
From: DUPONT ELECTRONICS, INC.
To: SOLAR PASTE, LLC
Reel/Frame 055766/0478 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2019
From: E. I. DU PONT DE NEMOURS AND COMPANY
To: DUPONT ELECTRONICS, INC.
Reel/Frame 049583/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2013
From: ANDERSON, RUSSELL DAVID; HANG, KENNETH WARREN; KAO, SHIH-MING; LAUDISIO, GIOVANNA; LIN, CHENG-NAN; WU, CHUN-KWEI
To: E. I. DU PONT DE NEMOURS AND COMPANY
Reel/Frame 031032/0123 →