WAFER ALIGNMENT AND BONDING TOOL FOR 3D INTEGRATION
A bonding apparatus for 3D integration may include a plurality of infrared microscopes that emit and receive infrared light for imaging, a first bonding chuck that holds a first semiconductor structure, and a second bonding chuck that holds a second semiconductor structure, whereby the second bonding chuck has a plurality of openings that are transparent to the received infrared light. A force pin is coupled to the first bonding chuck for applying a predetermined force to the first semiconductor structure for bonding to the second semiconductor structure. A temperature controller is coupled to the second bonding chuck, whereby the temperature controller applies a predetermined temperature to the second semiconductor structure, such that, prior to the bonding, the first and the second semiconductor structure are de-aligned with respect to each other using the plurality of infrared microscopes and the plurality of openings. The de-alignment is based on the predetermined force and the application of the predetermined temperature.
1 . A bonding apparatus comprising:
a plurality of infrared microscopes that emit and receive infrared light for imaging,
a first bonding chuck that holds a first semiconductor structure;
a second bonding chuck that holds a second semiconductor structure, the second bonding chuck having a plurality of openings that are transparent to the received infrared light;
a force pin coupled to the first bonding chuck, wherein the force pin applies a predetermined force to the first semiconductor structure for bonding to the second semiconductor structure; and
a temperature controller coupled to the second bonding chuck, wherein the temperature controller applies a predetermined temperature to the second semiconductor structure,
wherein, prior to the bonding, the first and the second semiconductor structure are de-aligned with respect to each other using the plurality of infrared microscopes and the plurality of openings, the de-aligning being based on the predetermined force and the application of the predetermined temperature.
2 . The apparatus of claim 1 , wherein:
the first semiconductor structure comprises a first plurality of alignment markers; and
the second semiconductor structure comprises a second plurality of alignment markers,
wherein the second plurality of alignment markers are de-aligned with respect to the first plurality of alignment markers by imaging the first and the second alignment markers, by the plurality of infrared microscopes, through the first and the second plurality of openings.
3 . The apparatus of claim 2 , wherein the first semiconductor structure comprises a first plurality of regions that respectively include the first plurality of alignment markers, the first plurality of regions being substantially transparent to the generated infrared light.
4 . The apparatus of claim 2 , wherein the second semiconductor structure comprises a second plurality of regions that respectively include the second plurality of alignment markers, the second plurality of regions being substantially transparent to the generated infrared light.
5 . The apparatus of claim 1 , wherein the predetermined temperature comprises a temperature increase having a range of about 0 to 10 degrees Celsius relative to an ambient temperature corresponding to the second semiconductor structure when positioned in the second bonding chuck.
6 . The apparatus of claim 1 , wherein the predetermined temperature comprises a temperature decrease having a range of about 0 to 10 degrees Celsius relative to an ambient temperature corresponding to the second semiconductor structure when positioned in the second bonding chuck.
7 . The apparatus of claim 1 , wherein the predetermined temperature comprises a temperature increase having a range of about 1 to 2 degrees Celsius relative to an ambient temperature corresponding to the second semiconductor structure when positioned in the second bonding chuck.
8 . The apparatus of claim 1 , wherein the predetermined temperature comprises a temperature decrease having a range of about 1 to 2 degrees Celsius relative to an ambient temperature corresponding to the second semiconductor structure when positioned in the second bonding chuck.
9 . The apparatus of claim 1 , wherein the predetermined force to the first semiconductor structure for bonding to the second semiconductor structure comprises a force in the range of about 0.5 Newtons to about 10 Newtons.
10 . The apparatus of claim 1 , wherein:
the first semiconductor structure comprises one of a first wafer and a first die; and
the second semiconductor structure comprises one of a second wafer and a second die.
11 . A method of bonding a first semiconductor structure located within a first bonding chuck to a second semiconductor structure located within a second bonding chuck, the method comprising:
positioning the first bonding chuck relative to the second bonding chuck such that a first and a second alignment marker associated with the first semiconductor structure are substantially facing a third and a fourth alignment marker associated with the second semiconductor structure;
de-aligning the third alignment marker with respect to the first alignment marker using a first infrared microscope, the first infrared microscope receiving infrared light from the first and third alignment marker via an opening in the second bonding chuck;
de-aligning the fourth alignment marker with respect to the second alignment marker by a second infrared microscope, the second infrared microscope receiving infrared light from the second and fourth alignment marker via an other opening in the second bonding chuck; and
bonding the first and the second semiconductor structure by mechanical compression of the first and the second semiconductor structure together using the first and the second bonding chuck,
wherein the de-aligning of the third and the fourth alignment marker is accomplished by applying a temperature to the first chuck.
12 . The method of claim 11 , wherein the bonding comprises applying a predetermined force to the first chuck holding the first semiconductor structure.
13 . The method of claim 12 , wherein the applied predetermined force comprises a force of about 0.5 Newtons to about 10 Newtons.
14 . The method of claim 11 , wherein the applied temperature comprises providing a temperature increase in the range of about 0 to 10 degrees Celsius, the temperature increase physically expanding the second semiconductor structure.
15 . The method of claim 11 , wherein the applied temperature comprises providing a temperature decrease in the range of about 0 to 10 degrees Celsius, the temperature decrease physically contracting the second semiconductor structure.
16 . The method of claim 11 , wherein the de-aligning of the third and the fourth alignment marker is based on the mechanical compression.
17 . The method of claim 16 , wherein the de-aligning of the third and the fourth alignment marker is further based on alignment errors between the first and the second alignments markers, and the third and the fourth alignments markers caused by semiconductor structure distortion.
18 . The apparatus of claim 11 , wherein:
the first semiconductor structure comprises one of a first wafer and a first die; and
the second semiconductor structure comprises one of a second wafer and a second die.
19 . A bonding chuck apparatus comprising:
a first bonding chuck that holds a first semiconductor structure;
a second bonding chuck that holds a second semiconductor structure, the second bonding chuck having a plurality of openings that are transparent to infrared light associated with a plurality of infrared microscopes, wherein the plurality of openings facilitate de-aligning the first and the second semiconductor structures using the plurality of infrared microscopes;
a force pin coupled to the first bonding chuck, wherein the force pin applies a predetermined force to the first semiconductor structure for bonding to the second semiconductor structure; and
a temperature controller coupled to the second bonding chuck, wherein the temperature controller applies a predetermined temperature to the second semiconductor structure for causing the de-aligning prior to the bonding,
wherein, upon bonding of the first semiconductor structure to the second semiconductor structure by the force pin, the first and the second semiconductor structure are realigned with respect to each other based on the application of the predetermined temperature prior to the bonding.
20 . The apparatus of claim 19 , wherein:
the first semiconductor structure comprises one of a first wafer and a first die; and
the second semiconductor structure comprises one of a second wafer and a second die.