Constructing persistent file system from scattered persistent regions
Methods and apparatus related to constructing a persistent file system from scattered persistent regions are described. In one embodiment, stored information in a storage unit corresponds to one or more persistent memory regions that are scattered amongst one or more non-volatile memory devices. The one or more persistent memory regions are byte addressable. Also, the one or more persistent memory regions are used to form a virtual contiguous region. Other embodiments are also disclosed and claimed.
1. An apparatus comprising:
a storage unit to store information corresponding to one or more persistent memory regions that are scattered amongst one or more non-volatile memory devices, wherein the one or more persistent memory regions are byte addressable and wherein the one or more persistent memory regions are to form a virtual contiguous region,
wherein each of the one or more persistent memory regions is to be assigned a first tag and a second tag, wherein the first tag or the second tag of each of the one or more persistent memory regions is to be matched with the first tag or the second tag of another one of the one or more persistent memory regions to form the virtual contiguous region.
2. The apparatus of claim 1 , comprising logic to form the virtual contiguous region from the one or more persistent memory regions based on a plurality of tags.
3. The apparatus of claim 1 , wherein the storage unit is to store the information in a table in accordance with Advanced Configuration and Power Interface (ACPI).
4. The apparatus of claim 1 , wherein a Basic Input Output System (BIOS) is to describe the one or more persistent memory regions to an Operating System (OS) via the stored information.
5. The apparatus of claim 4 , comprising logic to allow the OS to initialize the one or more persistent memory regions with a plurality of tags.
6. The apparatus of claim 5 , comprising logic to allow the OS to reconstruct the virtual contiguous region.
7. The apparatus of claim 1 , wherein the stored information is to comprise one or more of: header signature, length, revision, checksum, Original Equipment Manufacturer (OEM) Identifier (ID), OEM table ID, OEM revision, creator ID, creator revision, persistent memory region base address, persistent memory region length, and one or more persistent memory region flags.
8. The apparatus of claim 1 , wherein the stored information is to comprise one or more persistent memory region base addresses, persistent memory region lengths, and one or more persistent memory region flags.
9. The apparatus of claim 1 , wherein the one or more non-volatile memory devices are to comprise one or more of: flash memory, 3D (3-Dimensional) Cross Point Memory, Resistive Random Access Memory, and Spin Torque Transfer Random Access Memory (STTRAM).
10. The apparatus of claim 1 , wherein the one or more non-volatile memory devices are on a same integrated circuit die.
11. The apparatus of claim 1 , wherein one or more of a controller logic, a memory, the one or more non-volatile memory devices, and a processor core are on a same integrated circuit die.
12. The apparatus of claim 11 , wherein a memory controller is to comprise the controller logic.
13. A method comprising:
storing information in a storage unit, wherein the stored information corresponds to one or more persistent memory regions that are scattered amongst one or more non-volatile memory devices, wherein the one or more persistent memory regions are byte addressable, wherein the one or more persistent memory regions are to form a virtual contiguous region,
wherein each of the one or more persistent memory regions is assigned a first tag and a second tag, wherein the first tag or the second tag of each of the one or more persistent memory regions is matched with the first tag or the second tag of another one of the one or more persistent memory regions to form the virtual contiguous region.
14. The method of claim 13 , further comprising forming the virtual contiguous region from the one or more persistent memory regions based on a plurality of tags.
15. The method of claim 13 , further comprising the storage unit storing the information in a table in accordance with Advanced Configuration and Power Interface (ACPI).
16. The method of claim 13 , further comprising describing the one or more persistent memory regions to an Operating System (OS) via the stored information.
17. The method of claim 16 , further comprising the OS causing initialization of the one or more persistent memory regions with a plurality of tags.
18. The method of claim 16 , further comprising the OS causing reconstruction of the virtual contiguous region.
19. The method of claim 13 , wherein the one or more non-volatile memory devices comprise one or more of: flash memory, 3D Cross Point Memory, Resistive Random Access Memory, and Spin Torque Transfer Random Access Memory (STTRAM).
20. A system comprising:
one or more non-volatile memory devices;
a processor to access data stored on the one or more non-volatile memory devices via controller logic;
the controller logic to control access to the one or more non-volatile memory devices;
a storage unit to store information corresponding to one or more persistent memory regions that are scattered amongst the one or more non-volatile memory devices, wherein the one or more persistent memory regions are byte addressable and wherein the one or more persistent memory regions are to form a virtual contiguous region,
wherein each of the one or more persistent memory regions is to be assigned a first tag and a second tag, wherein the first tag or the second tag of each of the one or more persistent memory regions is to be matched with the first tag or the second tag of another one of the one or more persistent memory regions to form the virtual contiguous region.
21. The system of claim 20 , wherein the one or more non-volatile memory devices are to comprise one or more of: flash memory, 3D Cross Point Memory, Resistive Random Access Memory, and Spin Torque Transfer Random Access Memory (STTRAM).
22. The system of claim 20 , comprising logic to form the virtual contiguous region from the one or more persistent memory regions based on a plurality of tags.
23. The system of claim 20 , wherein the storage unit is to store the information in a table in accordance with Advanced Configuration and Power Interface (ACPI).
24. The system of claim 20 , wherein a Basic Input Output System (BIOS) is to describe the one or more persistent memory regions to an Operating System (OS) via the stored information.
25. The system of claim 20 , wherein the stored information is to comprise one or more persistent memory region base addresses, persistent memory region lengths, and one or more persistent memory region flags.