IP Library › Granted Patent US 8,933,553
Granted Patent B2
US 8,933,553 · App. 13/934,858 · Granted Jan 13, 2015

Semiconductor unit

Inventors: Shinsuke Nishi (Aichi-ken, JP); Shogo Mori (Aichi-ken, JP); Yuri Otobe (Aichi-ken, JP); Naoki Kato (Aichi-ken, JP)
Assignee: Kabushiki Kaisha Toyota Jidoshokki
H01L23/52H01L23/3735H01L23/467H01L24/34H01L25/072H05K7/1432H01L23/645H01L23/3121
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Quick Facts
Patent No.
US 8,933,553
App. No.
13/934,858
Granted
Jan 13, 2015
Kind
B2
Abstract

A semiconductor unit includes a first conductive layer, a second conductive layer electrically insulated from the first conductive layer, a first semiconductor device mounted on the first conductive layer, a second semiconductor device mounted on the second conductive layer, a first bus bar for electrical connection of the second semiconductor device to the first conductive layer, and a second bus bar for electrical connection of the first semiconductor device to one of the positive and negative terminals of a battery. The first bus bar is disposed in overlapping relation to the second bus bar in such a manner that mold resin fills between the first bus bar and the second bus bar.

Claims (22)

1. A semiconductor unit, comprising:

a first conductive layer;

a second conductive layer electrically insulated from the first conductive layer;

a first semiconductor device mounted on the first conductive layer;

a second semiconductor device mounted on the second conductive layer;

a first bus bar for electrical connection of the second semiconductor device to the first conductive layer; and

a second bus bar for electrical connection of the first semiconductor device to one of the positive and negative terminals of a battery,

wherein the first bus bar is disposed in overlapping relation to the second bus bar in such a manner that mold resin fills between the first bus bar and the second bus bar.

2. The semiconductor unit of claim 1 , further comprising a third bus bar for electrical connection of the second conductive layer to the other of the positive and negative terminals of the battery,

wherein the second bus bar is disposed in overlapping relation to the third bus bar in such a manner that mold resin fills between the second bus bar and the third bus bar.

3. The semiconductor unit of claim 2 , further comprising an insulation layer to which the first conductive layer and the second conductive layer are bonded.

4. The semiconductor unit of claim 3 , further comprising a heat radiation member bonded to the insulation layer.

5. The semiconductor unit of claim 4 , further comprising a stress relief member provided between the insulation layer and the heat radiation member.

6. The semiconductor unit of claim 2 , wherein the first semiconductor device includes three lower-arm switching devices each having a collector and an emitter, the second semiconductor device includes three upper-arm switching devices each having a collector and an emitter, the number of first conductive layers is three, the lower-arm switching devices are electrically connected at their collectors to the respective first conductive layers, the upper-arm switching devices are electrically connected at their collectors to the second conductive layer, the upper-arm switching devices are electrically connected at their emitters to the respective first conductive layers through the first bus bar, the lower-arm switching devices are electrically connected at their emitters to the negative terminal of the battery through the second bus bar, and the third bus bar is connected to the second conductive layer.

7. The semiconductor unit of claim 4 , wherein the heat radiation member is a cooler having therein plural coolant channels.

8. A semiconductor unit, comprising:

a first conductive layer;

a second conductive layer electrically insulated from the first conductive layer;

a first semiconductor device mounted on the first conductive layer;

a second semiconductor device mounted on the second conductive layer; and

two bus bars, wherein one of the bus bars is provided for electrical connection of the first semiconductor device to one of the positive and negative terminals of a battery, and an other one of the bus bars is provided for electrical connection of the second conductive layer to the other of the positive and negative terminals of the battery;

wherein the two bus bars are disposed in overlapping relation to each other in such a manner that mold resin fills between the bus bars.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2013
From: NISHI, SHINSUKE; MORI, SHOGO; OTOBE, YURI; KATO, NAOKI
To: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
Reel/Frame 030736/0761 →
Priority Claims (1)
JP 2012-152579 · Jul 6, 2012 · national
Continuity (1)
Related Publication 20140008781A1 · Jan 9, 2014