Fin-type field effect transistor and method of fabricating the same
A fin-type field effect transistor includes a first fin including a first source, a first drain, and a first channel. The fin-type field effect transistor includes a second fin including a second source, a second drain, and a second channel. The fin-type field effect transistor includes a first semiconductor region under the first fin and a second semiconductor region under the second fin. A first reacted region is adjacent the first semiconductor region while a second reacted region is adjacent the second semiconductor region. The first reacted region has a first dimension causing a first strain in the first channel. The second reacted region has a second dimension causing a second strain in the second channel. The first strain and second strain are substantially equal to one another. A method of fabricating an example fin-type field effect transistor is provided.
1. A method of fabricating a fin-type field effect transistor comprising:
forming a first semiconductor region;
forming a second semiconductor region;
forming a first fin over the first semiconductor region, the first fin comprising a first source, a first drain, and a first channel;
forming a second fin over the second semiconductor region, the second fin comprising a second source, a second drain, and a second channel;
masking a portion of the second semiconductor region for a first period of time;
forming a first portion of a first reacted region from the first semiconductor region during the first period of time;
removing the mask after the first period of time; and
forming a second portion of the first reacted region and a second reacted region from the portion of the second semiconductor region during a second period of time after the first period of time, the first reacted region having a first dimension causing a first strain in the first channel, and the second reacted region having a second dimension causing a second strain in the second channel, the first strain substantially equal to the second strain.
2. The method of claim 1 , wherein the forming a second reacted region comprises forming a first portion of the second reacted region and a second portion of the second reacted region during the second period of time.
3. The method of claim 1 , wherein the forming a first portion of a first reacted region comprises forming a first oxidized region from the first semiconductor region.
4. The method of claim 1 , wherein the first semiconductor region comprises silicon germanium (SiGe) and the first reacted region comprises silicon germanium oxide (SiGeOx).
5. The method of claim 1 , wherein the forming a second reacted region comprises forming a second oxidized region from the portion of the second semiconductor region.
6. The method of claim 1 , wherein the second semiconductor region comprises silicon germanium (SiGe) and the second reacted region comprises silicon germanium oxide (SiGeOx).
7. A method of fabricating a fin-type field effect transistor comprising:
forming a first semiconductor region;
forming a second semiconductor region;
forming a first fin over the first semiconductor region, the first fin comprising a first source, a first drain, and a first channel;
forming a second fin over the second semiconductor region, the second fin comprising a second source, a second drain, and a second channel;
masking the second semiconductor region for a first period of time;
forming a first portion of a first reacted region from the first semiconductor region during the first period of time;
removing the mask after the first period of time;
forming a second portion of the first reacted region from the first semiconductor region during a second period of time after the first period of time; and
forming a first portion of a second reacted region from the second semiconductor region and a second portion of the second reacted region from the second semiconductor region during the second period of time, the first reacted region having a first dimension causing a first strain in the first channel, and the second reacted region having a second dimension causing a second strain in the second channel, the first strain substantially equal to the second strain.
8. The method of claim 7 , comprising exposing at least one of the first semiconductor region or the second semiconductor region to oxygen to form at least one of the first reacted region or the second reacted region.
9. The method of claim 7 , wherein the masking comprises masking at least one of a first side or a second side of the second semiconductor region.
10. The method of claim 9 , wherein the removing comprises removing the mask from the first side and the second side of the second semiconductor region.
11. A method of fabricating a fin-type field effect transistor comprising:
forming a first semiconductor region;
forming a second semiconductor region;
forming a first fin over the first semiconductor region, the first fin defining a first channel;
forming a second fin over the second semiconductor region, the second fin defining a second channel;
masking at least one side of the second semiconductor region;
exposing the first semiconductor region to oxygen while the at least one side of the second semiconductor region is masked to form a first portion of a first reacted region from the first semiconductor region;
removing the mask from the at least one side of the second semiconductor region; and
exposing the at least one side of the second semiconductor region to oxygen while further exposing the first semiconductor region to oxygen to form a second portion of the first reacted region from the first semiconductor region and to form a second reacted region from the second semiconductor region, wherein:
the second semiconductor region oxidizes at a faster rate than the first semiconductor region during the exposing the at least one side of the second semiconductor region to oxygen while further exposing the first semiconductor region to oxygen, and
the exposing the at least one side of the second semiconductor region to oxygen while further exposing the first semiconductor region to oxygen comprises:
exposing the at least one side of the second semiconductor region to oxygen while further exposing the first semiconductor region to oxygen until a width of the second reacted region is substantially equal to a width of the first reacted region.
12. The method of claim 11 , wherein the masking comprises masking at least two sides of the second semiconductor region.
13. The method of claim 11 , wherein the masking comprises masking a top surface of the second fin.
14. The method of claim 11 , wherein the exposing the first semiconductor region to oxygen comprises inducing swelling in the first semiconductor region.
15. The method of claim 14 , wherein the swelling creates a compressive strain in the first channel of the first fin.
16. The method of claim 11 , wherein the exposing the at least one side of the second semiconductor region to oxygen comprises inducing swelling in the second semiconductor region.
17. The method of claim 16 , wherein the swelling creates a compressive strain in the second channel of the second fin.
18. The method of claim 11 , wherein the first semiconductor region comprises silicon germanium (SiGe) and the first reacted region comprises silicon germanium oxide (SiGeOx).
19. The method of claim 18 , wherein the second semiconductor region comprises silicon germanium (SiGe) and the second reacted region comprises silicon germanium oxide (SiGeOx).
20. The method of claim 11 , wherein the second semiconductor region is substantially cylindrical and the masking the second semiconductor region comprises forming the mask around a circumference of the second semiconductor region.