IP Library Granted Patent US 9,368,584
Granted Patent B2
US 9,368,584 · App. 13/937,724 · Granted Jun 14, 2016

Gallium nitride power semiconductor device having a vertical structure

Inventors: Max Sk Chen (New Taipei, TW); Yih-Yin Nmi Lin (Taipei, TW)
H01L29/205H01L29/2003H01L29/66469H01L29/7787H01L29/7788
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Quick Facts
Patent No.
US 9,368,584
App. No.
13/937,724
Granted
Jun 14, 2016
Kind
B2
Abstract

A semiconductor device includes a substrate having first and second sides and a first active layer disposed over the first side of the substrate. A second active layer is disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. At least one trench extends through the first and second active layers and the two-dimensional electron gas layer and into the substrate. A conductive material lines the trench. A first electrode is disposed on the second active layer and a second electrode is disposed on the second side of the substrate.

Claims (33)

1. A semiconductor device, comprising:

a substrate having first and second sides;

a first active layer disposed over the first side of the substrate;

a second active layer disposed on the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer;

at least one trench extending through the first and second active layers and the two-dimensional electron gas layer and into the substrate;

a conductive material lining the trench;

a first electrode disposed on the second active layer; and

a second electrode disposed on the second side of the substrate;

a third electrode disposed on the second active layer, said first, second and third electrodes being source, drain and gate electrodes, respectively.

2. The semiconductor device of claim 1 , wherein the at least one trench comprises a pair of trenches extending through the first and second active layers and the two-dimensional electron gas layer and into the substrate, each of the trenches being lined with a conductive material.

3. The semiconductor device of claim 1 , wherein the first active layer includes an epitaxial layer.

4. The semiconductor device of claim 1 , wherein the first electrode is a Schottky contact.

5. The semiconductor device of claim 4 , wherein the second electrode is an Ohmic contact.

6. The semiconductor device of claim 1 , wherein the first active layer comprises a group III nitride semiconductor material.

7. The semiconductor device of claim 6 , wherein the first active layer comprises GaN.

8. The semiconductor device of claim 1 , wherein the second active layer comprises a group III nitride semiconductor material.

9. The semiconductor device of claim 8 , wherein the second active layer comprises Al X Ga 1-X N, wherein 0<X<1.

10. The semiconductor device of claim 1 , further comprising a dielectric layer disposed between each of the third electrodes and the second active layer.

11. The semiconductor device of claim 1 , wherein the third electrodes are Schottky electrodes.

12. The semiconductor device of claim 1 , further comprising a passivation material filling the trench.

13. A method of forming a semiconductor device, comprising:

forming a first active layer on a substrate;

forming a second active layer over the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer;

forming at least one trench that extends through the first and second active layers and the two-dimensional electron gas layer and into the substrate;

lining the trench with a conductive material;

filling the trench with a passivation material;

forming a first electrode on the second active layer; and

forming a second electrode on a bottom side of the substrate;

forming a third electrode disposed on the second active layer, said first, second and third electrodes being source, drain and gate electrodes, respectively.

14. The method of claim 13 , wherein the at least one trench comprises a pair of trenches and further comprising forming a the pair of trenches so that each of the trenches extend through the first and second active layers and the two-dimensional electron gas layer and into the substrate, each of the trenches being lined with a conductive material and filled with a passivation material.

15. The method of claim 13 , wherein the first electrode is a Schottky contact.

16. The method of claim 15 , wherein the second electrode is an Ohmic contact.

17. The method of claim 13 , wherein the first active layer comprises a group III nitride semiconductor material.

Assignments (3)
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED ON REEL 030874, FRAME 0346. ASSIGNORS HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2013
From: CHEN, MAX SK; LIN, YIH-YIN
To: VISHAY GENERAL SEMICONDUCTOR LLC
Reel/Frame 031252/0820 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2013
From: CHEN, MAX SK; LIN, YIH-YIN NMI
To: VISHAY GENERAL SEMICONDUCTOR LLC
Reel/Frame 030874/0346 →
Continuity (1)
Related Publication 20150014696A1 · Jan 15, 2015