IP Library Granted Patent US 9,031,056
Granted Patent B2
US 9,031,056 · App. 13/938,239 · Granted May 12, 2015

Wireless communication apparatus and method

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Quick Facts
Patent No.
US 9,031,056
App. No.
13/938,239
Granted
May 12, 2015
Kind
B2
Abstract

A transmission node for use in a wireless communication network includes a first register for storing a set of first mask bits, a second register for storing a set of second mask bits, and a mask switching block for multiplexing the set of first mask bits and the set of second mask bits and outputting the set of third mask bits. The transmission node further includes a CPRI unit with an auxiliary interface for receiving the set of third mask bits. An activation block is connected between the CPRI unit and the mask switching block for causing the mask switching block to output the set of second mask bits based on data in a current frame in the CPRI unit.

Claims (30)

1. A transmission node for use in a wireless communication network, comprising:

a first register for storing a set of first mask bits;

a second register for storing a set of second mask bits;

a mask switching block connected to the first register and the second register for multiplexing the set of first mask bits and the set of second mask bits and outputting a set of third mask bits;

a CPRI unit comprising an auxiliary interface for receiving the set of third mask bits;

an activation block connected between the CPRI unit and the mask switching block for instructing the mask switching block to output the set of second mask bits based on data in a current frame in the CPRI unit; and

a synchronization block connected between the mask switching block and the auxiliary interface for providing the set of third mask bits output from the mask switching block to the auxiliary interface synchronously with a synchronization signal.

2. The transmission node of claim 1 , wherein the sets of first and second mask bits are provided to the mask switching block by way of a register programming bus.

3. The transmission node of claim 1 , wherein the mask switching block comprises a plurality of multiplexers to switch between the set of first mask bits and the set of second mask bits.

4. The transmission node of claim 1 , wherein the activation block comprises:

a first comparator for detecting a frame with a predetermined frame number; and

a second comparator for detecting a sequence with a predetermined sequence number in the frame, wherein the activation block instructs the mask switching block to output the set of second mask bits when the sequence with a predetermined sequence number in the frame with a predetermined frame number is detected.

5. The transmission node of claim 1 , wherein instructing the mask switching block to output the set of second mask bits further depends on a feature enabling signal.

6. The transmission node of claim 5 , further comprising a third register in the transmission node for storing the feature enable signal, wherein the feature enable signal is provided to the third register by way of a register programming bus.

7. The transmission node of claim 1 , wherein the set of third mask bits is provided to the auxiliary interface when the auxiliary interface is enabled.

8. The transmission node of claim 1 , wherein the CPRI unit transmits the data in the current frame in the CPRI unit in a transmission chain to a next CPRI unit in the transmission chain based on the set of third mask bits.

9. A method of operating a transmission node for use in a wireless communication network, comprising:

storing a set of first mask bits in a first register;

storing a set of second mask bits in a second register;

multiplexing the set of first mask bits and the set of second mask bits with a mask switching block to provide a set of third mask bits, wherein the set of third mask bits is one of the set of first mask bits or the set of second mask bits;

capturing data in a current frame in a CPRI unit;

instructing the mask switching block to output the set of second mask bits to an auxiliary interface of the CPRI unit based on the captured data in the current frame in the CPRI unit; and

synchronizing the set of third mask bits provided by the mask switching block with a synchronization signal prior to providing the set of third mask bits to the auxiliary interface of the CPRI unit.

10. The method of claim 9 , wherein the sets of first and second mask bits are provided to the mask switching block by way of a register programming bus.

11. The method of claim 9 , wherein the mask switching block comprises a plurality of multiplexers to switch between the set of first mask bits and the set of second mask bits.

12. The method of claim 9 , wherein instructing the mask switching block to output the set of second mask bits to an auxiliary interface of the CPRI unit based on the captured data in the current frame in the CPRI unit includes detecting a frame with a predetermined frame number and a sequence with a predetermined sequence number in the frame, and instructing the mask switching block to output the set of second mask bits when the sequence with a predetermined sequence number in the frame with a predetermined frame number is detected.

13. The method of claim 9 , wherein activating the mask switching block to output the set of second mask bits further depends on a feature enabling signal.

14. The method of claim 13 , wherein the feature enabling signal is stored in a third register in the transmission node and is provided by way of a register programming bus.

15. The method of claim 9 , wherein the set of third mask bits is provided to the auxiliary interface when the auxiliary interface is enabled.

16. The method of claim 9 , further comprising transmitting the data in the current frame to another CPRI unit based on the set of third mask bits.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PCT NUMBERS IB2013000664, US2013051970, US201305935 PREVIOUSLY RECORDED AT REEL: 037444 FRAME: 0787. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Oct 17, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 040450/0715 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0787 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2013
From: JAIN, SACHIN; DAHIYA, SOMVIR; GARG, ARVIND; KAUSHIK, ARVIND; SINHA, ARINDHAM
To: FREESCALE SEMICONDUCTOR, INC.
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