Integrated circuits having device contacts and methods for fabricating the same

1. A method for fabricating an integrated circuit having a device contact, the method comprising;

providing a contact that extends through an ILD layer of dielectric material overlying a device region, the contact comprising seam void;

forming a conductive plug that partially fills the seam void formed such that the conductive plug fills an upper portion of the contact seam void and leaves a lower-most portion of the seam void unfilled forming an enclosed space between the conductive plug and the lower-most portion of the contact; and

depositing a metallization layer overlying the contact.

2. The method of claim 1 , wherein forming the conductive plug comprises filling at least about 50% of a depth of the contact seam void with the conductive plug.

3. The method of claim 2 , wherein forming the conductive plug comprises filling from about 50 to about 75% of the depth of the contact seam void with the conductive plug.

4. The method of claim 1 , wherein forming the conductive plug comprises filling an upper portion of the contact seam void with the conductive plug.

5. The method of claim 4 , wherein forming the conductive plug comprises forming the conductive plug such that the conductive plug is disposed in the upper portion spaced apart from a lower-most portion of the contact seam void.

6. The method of claim 1 , further comprising forming a liner overlying and in direct contact with both the contact and the conductive plug, wherein depositing the metallization layer comprises depositing the metallization layer overlying the liner.

7. The method of claim 6 , wherein forming the liner comprises depositing Ti and/or TiN overlying the contact to form the liner.

8. The method of claim 1 , wherein depositing the metallization layer comprises depositing Cu using an ECP process to form the metallization layer.

9. The method of claim 1 , wherein forming the conductive plug comprises forming the conductive plug that comprises Ti, TiN, or a combination thereof.

10. A method for fabricating an integrated circuit having a device contact, the method comprising:

filling a contact opening with conductive material to form a contact, wherein the contact opening is formed in a first ILD layer of dielectric material that overlies a device region, optionally with a liner disposed between the contact and the ILD layer;

planarizing the conductive material to expose a contact seam void formed in the contact;

depositing Ti and/or TiN to form a Ti/TiN layer that partially fills the contact seam void to define a conductive plug and that overlies the contact and the first ILD layer such that the conductive plug fills an upper portion of the contact seam void and leaves a lower-most portion of the seam void unfilled forming an enclosed space between the conductive plug and the lower-most portion of the contact; and depositing a metallization layer overlying the contact;

depositing a second ILD layer of dielectric material overlying the first ILD layer and the contact;

etching the second ILD layer to form a sidewall that defines a metallization trench to expose both the contact and the conductive plug;

forming a liner in the metallization trench overlying the sidewall and the contact, wherein the liner is in direct contact with both the contact and the conductive plug; and

plating a metallization layer in the metallization trench overlying the liner.

11. The method of claim 10 , wherein filling the contact opening comprises filling the contact opening with W to form the contact.

12. The method of claim 10 , wherein planarizing the conductive material comprises planarizing the conductive material using a CMP process.

13. The method of claim 10 , wherein depositing Ti and/or TiN comprises depositing Ti and/or TiN using a PVD process.

14. The method of claim 10 , further comprising depositing an etch stop layer overlying the first ILD layer and the contact, wherein depositing the second ILD layer comprises depositing the second ILD layer overlying the etch stop layer, and wherein etching the second ILD layer comprises etching through the second ILD layer and the etch stop layer to expose the contact.

15. The method of claim 10 , further comprising depositing an N-doped silicon carbide (SiCN) layer overlying the second ILD layer and the metallization layer.

16. The method of claim 10 , wherein depositing Ti and/or TiN further comprises forming a Ti/TiN layer overlying the first ILD layer and the contact.

17. The method of claim 16 , wherein depositing Ti and/or TiN comprises forming the Ti/TiN layer having a thickness of from about 3 to about 20 nm.

18. The method of claim 16 , further comprising planarizing the Ti/TiN layer to expose the contact prior to depositing the second ILD layer.

19. The method of claim 18 , wherein planarizing the Ti/TiN layer comprises planarizing the Ti/TiN layer using a mild CMP process.

20. An integrated circuit having a device contact, the integrated circuit comprising:

a device region;

an ILD layer of dielectric material overlying the device region;

a contact extending through the ILD layer to the device region, wherein the contact has a contact seam void formed therein; and

a conductive plug that at least partially fills the contact seam void.