IP Library › Granted Patent US 9,443,050
Granted Patent B2
US 9,443,050 · App. 13/956,140 · Granted Sep 13, 2016

Low-voltage swing circuit modifications

Inventors: Jacob Postman (Corvallis, OR); Patrick Yin Chiang (Sacramento, CA)
Assignee: Oregon State University
G06F17/5068G06F17/5081G06F17/5009G06F17/5045G06F17/5077G06F2217/12
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Quick Facts
Patent No.
US 9,443,050
App. No.
13/956,140
Granted
Sep 13, 2016
Kind
B2
Abstract

Electronic design automation (EDA) technologies are disclosed that analyze a circuit design for candidate low-voltage swing (LVS) modifications, report the impact of the candidate LVS modifications on circuit characteristics (such as area, timing and energy) and implement selected LVS modifications based on their impact on the circuit characteristics. Candidate LVS modifications comprise replacing existing standard low-voltage swing drivers and receivers, or inserting low-voltage swing drivers and receivers.

Claims (35)

1. A computer-implemented method of modifying a circuit design, comprising:

by a computer, identifying one or more replaceable sets in a description of a circuit design, respective ones of the replaceable sets being associated with one or more candidate low-voltage swing (LVS) modifications to the circuit design;

by the computer, determining the impact of implementing the one or more candidate LVS modifications on one or more characteristics of the circuit design;

by the computer, selecting at least one selected LVS modification from the one or more candidate LVS modifications based at least in part on the impact of the one or more candidate LVS modifications on the one or more characteristics of the circuit design; and

by the computer, modifying the description of the circuit design to implement the at least one selected LVS modification.

2. The computer-implemented method of claim 1 , wherein the circuit design is a CMOS circuit design.

3. The computer-implemented method of claim 1 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell, and wherein at least one of the one or more candidate LVS modifications comprises replacing the one or more receiver cells with one or more low-voltage swing receiver cells.

4. The computer-implemented method of claim 1 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell and wherein at least one of the one or more candidate LVS modifications comprises replacing the driver cell with a low-voltage swing driver cell.

5. The computer-implemented method of claim 1 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell and wherein at least one of the one or more candidate LVS modifications comprises inserting a low-voltage swing driver cell between the driver cell and the net being driven by the driver cell.

6. The computer-implemented method of claim 1 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell and wherein at least one of the one or more candidate LVS modifications comprises inserting a low-voltage swing receiver cell before one of the one or more receiver cells.

7. The computer-implemented method of claim 1 , wherein the one or more candidate LVS modifications comprise replacing digital standard cells with low-voltage swing standard cells.

8. The computer-implemented method of claim 1 , wherein the one or more candidate LVS modifications comprise the insertion of low-voltage swing standard cells.

9. The computer-implemented method of claim 1 , wherein the at least one selected LVS modification satisfies one or more user-specified design constraints.

10. The computer-implemented method of claim 9 , wherein the one or more user-specified design constraints comprise at least one of an energy constraint, a timing constraint, an area constraint or a power constraint.

11. The computer-implemented method of claim 1 , wherein the at least one selected LVS modification is selected in accordance with a modification profile.

12. The computer-implemented method of claim 11 , wherein the modification profile specifies a priority for the impact of implementing LVS modifications on circuit characteristics.

13. The computer-implemented method of claim 11 , wherein the modification profile specifies allowable tradeoffs between circuit characteristics.

14. The computer-implemented method of claim 1 , wherein the identifying comprises identifying as one of the replaceable sets a net, a replaceable driver driving the net, one or more replaceable receiver cells having an input pin connected to the net, and one or more non-replaceable receiver cells having an input pin connected to the net; the candidate LVS modification associated with the one of the replaceable sets comprising:

splitting the net into a first net and a second net;

connecting the first net to the output of the driver cell, an input pin of the one or more non-replaceable receiver cells and the input of an inserted buffer or inverter; and

connecting the second net to the output of the inserted buffer or inverter and an input pin of the one or more replaceable receiver cells.

15. The computer-implemented method of claim 1 , wherein the description comprises a netlist, the identifying comprising:

identifying a path in the netlist comprising a top parent net having one or more descendant nets connected to the top parent net by one or more inverters or buffers;

identifying at least one of the one or more descendent nets that are replaceable, have one or more replaceable child nets, and do not have non-replaceable child nets; and

assigning the identified at least one of the replaceable descendent nets and their one or more replaceable child nets to one of the one or more replaceable sets,

wherein the LVS modification associated with the one replaceable set comprises removing at least one of the one or more inverters or buffers.

16. The computer-implemented method of claim 1 , wherein the description comprises one or more netlists and the modifying comprises modifying the one or more netlists.

17. The computer-implemented method of claim 1 , wherein the description comprises one or more physical design files and the modifying comprises modifying the one or more physical design files.

18. One or more non-transitory computer-readable media storing computer-executable instructions which when executed by a computer cause the computer to perform a method, the method comprising:

by the computer, identifying one or more replaceable sets in a description of a circuit design, respective ones of the replaceable sets being associated with one or more candidate low-voltage swing (LVS) modifications to the circuit design;

by the computer, determining the impact of implementing the one or more candidate LVS modifications on one or more characteristics of the circuit design;

by the computer, selecting at least one selected LVS modification from the one or more candidate LVS modifications based at least in part on the impact of the one or more candidate LVS modifications on the one or more characteristics of the circuit design; and

by the computer, modifying the description of the circuit design to implement the at least one selected LVS modification.

19. The one or more non-transitory computer-readable media of claim 18 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell, and wherein at least one of the one or more candidate LVS modifications comprises replacing the one or more receiver cells or the driver cell with one or more low-voltage swing receiver cells.

20. The one or more non-transitory computer-readable media of claim 18 , wherein at least one of the one or more candidate LVS modifications are associated with a driver cell and one or more receiver cells driven directly or indirectly by the driver cell and wherein at least one of the one or more candidate LVS modifications comprises inserting a low-voltage swing driver cell between the driver cell and the net being driven by the driver cell or inserting a low-voltage swing receiver cell before one of the one or more receiver cells.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2016
From: POSTMAN, JACOB; CHIANG, PATRICK YIN
To: STATE OF OREGON ACTING BY AND THROUGH THE STATE BOARD OF HIGHER EDUCATION ON BEHALF OF OREGON STATE UNIVERSITY
Reel/Frame 038848/0088 →
ENTITY CONVERSION Recorded Jun 8, 2016
From: STATE OF OREGON ACTING BY AND THROUGH THE STATE BOARD OF HIGHER EDUCATION ON BEHALF OF OREGON STATE UNIVERSITY
To: OREGON STATE UNIVERSITY
Reel/Frame 038925/0482 →
Continuity (2)
Provisional Application 61678536 · Aug 1, 2012
Related Publication 20140040843A1 · Feb 6, 2014