Thermally-isolated silicon-based integrated circuits and related methods
Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.
1. A thermally-isolated integrated circuit assembly formed on a silicon-based substrate having a back face that is free of etched openings, comprising:
a piezoelectric resonator;
a body of dielectric material;
a support bar;
a CMOS integrated circuit;
a base layer of silicon;
a base layer of silicon oxide above and contiguous to the silicon base layer; and
an active silicon layer above and contiguous to the silicon oxide base layer; wherein:
the CMOS integrated circuit comprises at least one device defined in the active silicon layer and further comprises a plurality of metallization layers that overlie the active silicon layer and are embedded in an interlayer dielectric;
a lower cavity is defined within the silicon base layer;
the body of dielectric material is suspended over the lower cavity by the support bar;
the CMOS integrated circuit is encased on top, bottom, and all sides by the body of dielectric material;
an upper cavity is defined in the top of the body of dielectric material;
the piezoelectric resonator is suspended over the upper cavity and electrically connected to the CMOS integrated circuit through vertical electrical conductors extending within the body of dielectric material;
the upper and lower cavities are interconnected by trenches in the body of dielectric material; and
the support bar is formed in the silicon-based substrate to provide physical contact between the silicon-based substrate and the body of dielectric material.
2. The thermally-isolated integrated circuit assembly as in claim 1 , wherein the CMOS integrated circuit comprises at least one component selected from the group consisting of diodes, capacitors, transistors, resistors and inductors.
3. The thermally-isolated integrated circuit assembly of claim 1 , wherein the piezoelectric resonator is directly contacted from above and below by respective electrode layers of electrically conductive material.
4. The thermally-isolated integrated circuit assembly as in claim 1 , further comprising a resistive heating element positioned so as to have a thermal path to the CMOS integrated circuit.
5. The thermally-isolated integrated circuit assembly as in claim 4 , further comprising a temperature sensor positioned within the circuit assembly so as to have a thermal path to the CMOS integrated circuit.
6. The thermally-isolated integrated circuit assembly as in claim 1 , wherein the silicon base layer, the silicon oxide base layer, and the active silicon layer are layers of an SOI wafer.
7. The thermally-isolated integrated circuit assembly of claim 1 , wherein the support bar is U-shaped.
8. The thermally-isolated integrated circuit assembly of claim 4 , wherein the resistive heating element is situated on the support bar.
9. The thermally-isolated integrated circuit assembly of claim 5 , wherein the temperature sensor is situated on the support bar.