IP Library Granted Patent US 9,082,863
Granted Patent B2
US 9,082,863 · App. 13/959,919 · Granted Jul 14, 2015

Semiconductor device and manufacturing method thereof

Inventor: Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L29/7869
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Quick Facts
Patent No.
US 9,082,863
App. No.
13/959,919
Granted
Jul 14, 2015
Kind
B2
Abstract

The present invention provides a transistor having electrically stable characteristics. In addition, the reliability of a semiconductor device including such a transistor is increased. The semiconductor device includes a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor stacked film overlapping with the gate electrode layer with the gate insulating film provided therebetween, and a pair of electrode layers in contact with the oxide semiconductor stacked film. In the semiconductor device, the oxide semiconductor stacked film includes at least indium and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked. Further, the first oxide semiconductor layer has an amorphous structure, the second oxide semiconductor layer and the third oxide semiconductor layer include a crystal part whose c-axis is substantially perpendicular to a top surface of the oxide semiconductor stacked film.

Claims (58)

1. A semiconductor device comprising:

a gate electrode layer;

an oxide semiconductor stacked film overlapping with the gate electrode layer with a first insulating film therebetween;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stacked film; and

a second insulating film overlapping with the oxide semiconductor stacked film,

wherein the oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked,

wherein the third oxide semiconductor layer includes a first region in contact with a top surface of the second oxide semiconductor layer and a second region in contact with top surfaces of the source electrode layer and the drain electrode layer,

wherein the second oxide semiconductor layer includes a first crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the second oxide semiconductor layer, and

wherein the third oxide semiconductor layer includes a second crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the third oxide semiconductor layer.

2. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer has an amorphous structure.

3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprise indium.

4. The semiconductor device according to claim 3 , wherein a proportion of indium in the second oxide semiconductor layer is higher than a proportion of indium in the first oxide semiconductor layer and a proportion of indium in the third oxide semiconductor layer.

5. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each have a thickness of more than or equal to 1 nm and less than or equal to 50 nm.

6. The semiconductor device according to claim 1 ,

wherein the first insulating film is in contact with the oxide semiconductor stacked film, and

wherein the second insulating film is in contact with the oxide semiconductor stacked film.

7. The semiconductor device according to claim 1 , wherein a concentration of silicon in each of the first oxide semiconductor layer and the third oxide semiconductor layer is less than or equal to 3×10 18 /cm 3 .

8. A display device comprising the semiconductor device according to claim 1 .

9. A semiconductor device comprising:

a first electrode layer;

an oxide semiconductor stacked film overlapping with the first electrode layer with a first insulating film therebetween;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stacked film; and

a second electrode layer overlapping with the oxide semiconductor stacked film with a second insulating film therebetween,

wherein the oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked,

wherein the third oxide semiconductor layer includes a first region in contact with a top surface of the second oxide semiconductor layer and a second region in contact with top surfaces of the source electrode layer and the drain electrode layer,

wherein the second oxide semiconductor layer includes a first crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the second oxide semiconductor layer, and

wherein the third oxide semiconductor layer includes a second crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the third oxide semiconductor layer.

10. The semiconductor device according to claim 9 , wherein the first oxide semiconductor layer has an amorphous structure.

11. The semiconductor device according to claim 9 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprise indium.

12. The semiconductor device according to claim 11 , wherein a proportion of indium in the second oxide semiconductor layer is higher than a proportion of indium in the first oxide semiconductor layer and a proportion of indium in the third oxide semiconductor layer.

13. The semiconductor device according to claim 9 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each have a thickness of more than or equal to 1 nm and less than or equal to 50 nm.

14. The semiconductor device according to claim 9 ,

wherein the first insulating film is in contact with the oxide semiconductor stacked film, and

wherein the second insulating film is in contact with the oxide semiconductor stacked film.

15. The semiconductor device according to claim 9 , wherein a concentration of silicon in each of the first oxide semiconductor layer and the third oxide semiconductor layer is less than or equal to 3×10 18 /cm 3 .

16. A display device comprising the semiconductor device according to claim 9 .

17. A semiconductor device comprising:

a gate electrode layer;

an oxide semiconductor stacked film overlapping with the gate electrode layer with a first insulating film therebetween;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor stacked film; and

a second insulating film overlapping with the oxide semiconductor stacked film,

wherein the oxide semiconductor stacked film includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked,

wherein the second oxide semiconductor layer includes a stacked structure,

wherein the third oxide semiconductor layer includes a first region in contact with a top surface of the second oxide semiconductor layer and a second region in contact with top surfaces of the source electrode layer and the drain electrode layer,

wherein the second oxide semiconductor layer includes a first crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the second oxide semiconductor layer, and

wherein the third oxide semiconductor layer includes a second crystalline structure whose c-axis is aligned in a direction parallel to a normal vector of a surface of the third oxide semiconductor layer.

18. The semiconductor device according to claim 17 , wherein the first oxide semiconductor layer has an amorphous structure.

19. The semiconductor device according to claim 17 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprise indium.

20. The semiconductor device according to claim 19 , wherein a proportion of indium in the second oxide semiconductor layer is higher than a proportion of indium in the first oxide semiconductor layer and a proportion of indium in the third oxide semiconductor layer.

21. The semiconductor device according to claim 17 , wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each have a thickness of more than or equal to 1 nm and less than or equal to 50 nm.

22. The semiconductor device according to claim 17 ,

wherein the first insulating film is in contact with the oxide semiconductor stacked film, and

wherein the second insulating film is in contact with the oxide semiconductor stacked film.

23. The semiconductor device according to claim 17 , wherein a concentration of silicon in each of the first oxide semiconductor layer and the third oxide semiconductor layer is less than or equal to 3×10 18 /cm 3 .

24. A display device comprising the semiconductor device according to claim 17 .

25. The semiconductor device according to claim 1 , wherein the second crystalline structure is included in the first region and is not included in the second region.

26. The semiconductor device according to claim 9 , wherein the second crystalline structure is included in the first region and is not included in the second region.

27. The semiconductor device according to claim 17 , wherein the second crystalline structure is included in the first region and is not included in the second region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2013
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 030963/0511 →
Priority Claims (1)
JP 2012-178617 · Aug 10, 2012 · national
Continuity (1)
Related Publication 20140042438A1 · Feb 13, 2014