IP Library Granted Patent US 8,924,816
Granted Patent B2
US 8,924,816 · App. 13/963,930 · Granted Dec 30, 2014

Method and system to improve the performance and/or reliability of a solid-state drive

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Quick Facts
Patent No.
US 8,924,816
App. No.
13/963,930
Granted
Dec 30, 2014
Kind
B2
Abstract

A method and system to improve the performance and/or reliability of a solid-state drive (SSD). In one embodiment of the invention, the SSD has logic to compress a block of data to be stored in the SSD. If it is not possible to compress the block of data below the threshold, the SSD stores the block of data without any compression. If it is possible to compress the block of data below the threshold, the SSD compresses the block of data and stores the compressed data in the SSD. In one embodiment of the invention, the SSD has logic to dynamically adjust or select the strength of the error correcting code of the data that is stored in the SSD. In another embodiment of the invention, the SSD has logic to provide intra-page XOR protection of the data in the page.

Claims (25)

1. An apparatus comprising:

one or more memory modules storing compressed data; and

a controller coupled to the one or more memory modules to dynamically adjust a strength of an Error Correcting Code (ECC) of data to be stored in the one or memory modules by performing:

add a known data pad to the compressed data;

determine ECC check bytes of the compressed data and the known data pad; and

add the determined ECC check bytes to the compressed data and the known data pad.

2. The apparatus of claim 1 , wherein the controller is further to:

compress the data;

determine whether the data is compressed below a threshold; and

write the compressed block of data into the one or more memory modules in response to a determination that the block of data is compressed below the threshold, wherein the threshold is based on at least one of a size of the compressed data, and a compression ratio of a size of the data to a size of the compressed data.

3. The apparatus of claim 2 , wherein the compressed data is to be partitioned into one or more data chunks and wherein the controller to dynamically adjust the strength of the ECC of the data to be stored in the one or memory modules is to:

determine a respective one of one or more ECC check bytes for each of the one or more data chunks; and

add the determined respective one ECC check bytes to each of the one or more data chunks.

4. The apparatus of claim 2 , wherein the compressed data is to be partitioned into one or more data chunks and wherein the controller to dynamically adjust the strength of the ECC of the data to be stored in the one or memory modules is to:

add a respective one of one or more known data pads to each of the one or more data chunks;

determine a respective one of one or more ECC check bytes of each of the one or more data chunks and each respective one of the one or more known data pads; and

add the determined respective one ECC check bytes to each data chunk and the respective one known data pad.

5. The apparatus of claim 1 , wherein the apparatus is a NAND flash memory solid-state drive (SSD).

6. An apparatus comprising:

one or more memory modules, wherein the data is to be partitioned into one or more data chunks to be stored in a memory page of the one or more memory modules; and

a controller to dynamically adjust the strength of the ECC of the data to be stored in the one or memory modules by performing:

select one of the one or more data chunks;

perform an exclusive OR (XOR) operation on all data chunks except the selected data chunks to obtain a XOR data chunk; and

replace the selected data chunk with the XOR data chunk to be stored in the memory page of the one or more memory modules.

7. The apparatus of claim 6 , wherein each data chunk comprises lossless compressed data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 062437/0329 →