IP Library Assignment 062437/0329
Patent Assignment
Reel/Frame 062437/0329

Assignment of Assignor's Interest

Recorded: 2023-01-19 Pages: 47
Assignor
INTEL CORPORATION
Executed: 2021-12-29
Assignee
SK HYNIX NAND PRODUCT SOLUTIONS CORP.
3101 N. 1ST STREET, SAN JOSE, CALIFORNIA, 95134
Covered Properties (64)
Presentation of Direct Accessed Storage Under a Logical Drive Model
Application: 15/224,006 →
Publication: US 2016/0335208
Presentation of Direct Accessed Storage Under a Logical Drive Model
Application: 16/936,078 →
Publication: US 2020/0349100
Method and Apparatus to Maintain Data Integrity in Disk Cache Memory During and After Periods of Cache Inaccessibility
Patent: 8,347,141 →
Application: 13/086,636 →
Publication: US 2011/0283139
Technique to Write to a Non-Volatile Memory
Patent: 7,797,479 →
Application: 11/172,608 →
Publication: US 2007/0005928
Power-Up Implementation for Block-Alterable Memory with Zero-Second Erase Time
Patent: 7,500,081 →
Application: 11/240,840 →
Publication: US 2007/0079055
Recovering from a Non-Volatile Memory Failure
Patent: 7,516,267 →
Application: 11/266,119 →
Publication: US 2007/0168698
Memory Cell Supply Voltage Control Based on Error Detection
Patent: 8,006,164 →
Application: 11/542,007 →
Publication: US 2008/0082899
Memory Cell Supply Voltage Control Based on Error Detection
Patent: 8,667,367 →
Application: 13/215,949 →
Publication: US 2011/0307761
Memory Cell Supply Voltage Control Based on Error Detection
Patent: 8,769,376 →
Application: 13/626,435 →
Publication: US 2013/0024752
Method of Managing Data on a Non-Volatile Memory
Patent: 8,510,533 →
Application: 12/517,062 →
Publication: US 2012/0124315
High Speed Interface for Non-Volatile Memory
Patent: 7,650,459 →
Application: 11/644,270 →
Publication: US 2008/0155207
Flexible Selection Command for Non-Volatile Memory
Patent: 8,006,044 →
Application: 11/644,630 →
Publication: US 2008/0155204
Flexible Selection Command for Non-Volatile Memory
Patent: 8,458,415 →
Application: 13/191,875 →
Publication: US 2012/0047334
Power saving in NAND flash memory
Patent: 8,489,780 →
Application: 11/644,474 →
Publication: US 2008/0155287
Dual Use for Data Valid Signal in Non-Volatile Memory
Patent: 7,725,645 →
Application: 11/724,811 →
Publication: US 2008/0228999
Configurable Device Id in Non-Volatile Memory
Patent: 7,609,562 →
Application: 11/701,302 →
Publication: US 2008/0181043
Method, Apparatus, and System for Dynamic Ecc Code Rate Adjustment
Patent: 8,122,323 →
Application: 11/683,631 →
Publication: US 2008/0222490
Device Selection Circuit and Method
Patent: 7,688,628 →
Application: 11/772,188 →
Publication: US 2009/0003092
Technique to Improve and Extend Endurance and Reliability of Multi-Level Memory Cells in a Memory Device
Patent: 7,802,132 →
Application: 11/840,421 →
Publication: US 2009/0046509
Using Inter-Arrival Times of Data Requests to Cache Data in a Computing Environment
Patent: 7,895,397 →
Application: 11/854,388 →
Publication: US 2009/0070527
Methods and Apparatuses for Nonvolatile Memory Wear Leveling
Patent: 7,917,689 →
Application: 12/006,013 →
Publication: US 2009/0172253
Dynamically Adjusting Cache Policy Based on Device Load in a Mass Storage System
Patent: 7,886,110 →
Application: 11/965,652 →
Publication: US 2009/0172249
Nand Power Fail Recovery
Patent: 7,941,692 →
Application: 12/006,280 →
Publication: US 2009/0172466
Nand Power Fail Recovery
Patent: 8,316,257 →
Application: 13/086,237 →
Publication: US 2011/0258487
Accelerated Resume from Hibernation in a Cached Disk System
Patent: 8,621,144 →
Application: 12/215,235 →
Publication: US 2009/0327608
Encrypting Data on a Non-Volatile Memory
Patent: 8,555,086 →
Application: 12/215,923 →
Publication: US 2009/0327759
Apparatus and Method for Multi-Level Cache Utilization
Patent: 8,166,229 →
Application: 12/215,762 →
Publication: US 2009/0327584
Apparatus and Method for Multi-Level Cache Utilization
Patent: 8,386,701 →
Application: 13/450,882 →
Publication: US 2012/0203960
Adjustable Read Reference for Non-Volatile Memory
Patent: 8,365,039 →
Application: 12/283,832 →
Publication: US 2009/0292969
Using Error Information from Nearby Locations to Recover Uncorrectable Data in Non-Volatile Memory
Patent: 8,276,028 →
Application: 12/283,861 →
Publication: US 2009/0292970
Data Encryption and/or Decryption by Integrated Circuit
Patent: 8,300,825 →
Application: 12/164,663 →
Publication: US 2009/0323961
Data Encryption and/or Decryption by Integrated Circuit
Patent: 9,031,238 →
Application: 13/661,654 →
Publication: US 2013/0124876
Error Correction in a Solid State Disk
Patent: 8,438,455 →
Application: 12/319,208 →
Publication: US 2010/0169743
Mainboard assembly including a package overlying a die directly attached to the mainboard
Application: 12/231,965 →
Publication: US 2010/0061056
Mainboard Assembly Including a Package Overlying a Die Directly Attached to the Mainboard
Application: 16/281,045 →
Publication: US 2019/0182958
Delta Checkpoints for a Non-Volatile Memory Indirection Table
Patent: 7,925,925 →
Application: 12/345,997 →
Publication: US 2010/0169710
Delta Checkpoints for a Non-Volatile Memory Indirection Table
Patent: 8,312,326 →
Application: 13/084,890 →
Publication: US 2011/0276827
Apparatus and Method for Segmented Cache Utilization
Patent: 8,572,321 →
Application: 13/533,372 →
Publication: US 2013/0007341
Data Error Recovery in Non-Volatile Memory
Patent: 8,291,297 →
Application: 12/316,986 →
Publication: US 2010/0162084
Prediction and cancellation of systematic noise sources in non-volatile memory
Patent: 8,407,564 →
Application: 12/460,221 →
Publication: US 2011/0016372
Method and System for Managing a Nand Flash Memory by Paging Segments of a Logical to Physical Address Map to a Non-Volatile Memory
Patent: 8,612,666 →
Application: 12/495,573 →
Publication: US 2010/0332730
Tracking a Lifetime of Write Operations to a Non-Volatile Memory Storage
Patent: 8,566,506 →
Application: 12/462,721 →
Publication: US 2011/0035535
Tracking a Lifetime of Write Operations to a Non-Volatile Memory Storage
Patent: 8,874,834 →
Application: 14/038,728 →
Publication: US 2014/0101374
Method to Improve a Solid State Disk Performance by Using a Programmable Bus Arbiter
Patent: 8,386,650 →
Application: 12/639,700 →
Publication: US 2011/0145478
Method for Trimming Data on Non-Volatile Flash Media
Patent: 8,386,537 →
Application: 12/638,496 →
Publication: US 2011/0145306
Virtual and Hidden Service Partition and Dynamic Enhanced Third Party Data Store
Patent: 8,949,565 →
Application: 12/647,538 →
Publication: US 2011/0161551
Persistent Moving Read Reference
Patent: 8,370,719 →
Application: 12/784,616 →
Publication: US 2011/0289388
Method and System for Wear Leveling in a Solid State Drive
Patent: 8,621,141 →
Application: 12/752,659 →
Publication: US 2011/0246705
Error Correction Mechanisms for Flash Memories
Patent: 8,433,985 →
Application: 12/748,746 →
Publication: US 2011/0239094
Protocol for Authenticating Functionality in a Peripheral Device
Patent: 8,578,161 →
Application: 12/752,929 →
Publication: US 2011/0246756
Protocol for Authenticating Functionality in a Peripheral Device
Patent: 9,059,854 →
Application: 14/051,364 →
Publication: US 2014/0032907
Method and System to Improve the Performance and/or Reliability of a Solid-State Drive
Patent: 8,533,550 →
Application: 12/825,858 →
Publication: US 2011/0320915
Method and System to Improve the Performance and/or Reliability of a Solid-State Drive
Patent: 8,924,816 →
Application: 13/963,930 →
Publication: US 2013/0326313
Method and System to Improve the Performance and/or Reliability of a Solid-State Drive
Patent: 9,317,362 →
Application: 14/339,407 →
Publication: US 2014/0337689
Techniques for Security Management Provisioning at a Data Storage Device
Patent: 9,064,116 →
Application: 12/941,915 →
Publication: US 2012/0117348
Method and Apparatus to Provide a High Availability Solid State Drive
Patent: 8,589,723 →
Application: 12/975,944 →
Publication: US 2012/0166699
Storage Drive with Ldpc Coding
Patent: 8,549,382 →
Application: 12/971,831 →
Publication: US 2012/0159285
Bch Decoding with Multiple Sigma Polynomial Calculation Algorithms
Patent: 8,601,351 →
Application: 13/049,606 →
Publication: US 2012/0240013
Adjustable Programming Speed for Nand Memory Devices
Patent: 8,595,597 →
Application: 13/039,553 →
Publication: US 2012/0226959
Dynamic Read Channel Calibration for Non-Volatile Memory Devices
Patent: 8,510,636 →
Application: 13/078,226 →
Publication: US 2012/0254699
Presentation of Direct Accessed Storage Under a Logical Drive Model
Patent: 9,417,821 →
Application: 13/976,262 →
Publication: US 2014/0189212
Secure Replay Protected Storage
Patent: 9,405,707 →
Application: 13/997,896 →
Publication: US 2014/0223198
Secure Replay Protected Storage
Patent: 9,411,748 →
Application: 13/631,556 →
Publication: US 2013/0159727
Extending the Capabilities of Existing Devices Without Making Modifications to the Existing Devices
Patent: 9,753,878 →
Application: 13/997,081 →
Publication: US 2014/0101465
Related Assignments (12)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 6, 2005
From: TRIKA, SANJEEV N.; FABER, ROBERT W.; COULSON, RICK; MATTHEWS, JEANNA N.
To: INTEL CORPORATION
Reel/Frame 016953/0586 →
Assignment of Assignor's Interest Nov 3, 2005
From: COULSON, RICHARD L.; TRIKA, SANJEEV N.; FABER, ROBERT W.
To: INTEL CORPORATION
Reel/Frame 017188/0973 →
Assignment of Assignor's Interest Apr 19, 2006
From: CHANDRAMOULI, SUBRAMANYAM; BABB, EDWARD M.; LI, BO
To: INTEL CORPORATION
Reel/Frame 017509/0982 →
Assignment of Assignor's Interest Dec 20, 2007
From: LEUNG, PETER; MAN, CHUN FUNG; ONG, CHONG
To: INTEL CORPORATION
Reel/Frame 020277/0519 →
Assignment of Assignor's Interest May 1, 2008
From: MUHAMMAD, KHELLAH; SOMASEKHAR, DINESH; YE, YIBIN; KIM, NAM SUNG
To: INTEL CORPORATION
Reel/Frame 020887/0685 →
Assignment of Assignor's Interest Sep 8, 2009
From: SUNDARAM, RAJESH
To: INTEL CORPORATION
Reel/Frame 023201/0683 →
Change of Name Sep 28, 2009
From: EILERT, SEAN S; ROZMAN, RODNEY R
To: INTEL CORPORATION
Reel/Frame 023293/0848 →
Assignment of Assignor's Interest Sep 28, 2009
From: QAWAMI, SHEFOUFEH
To: INTEL CORPORATION
Reel/Frame 023290/0743 →
Assignment of Assignor's Interest Oct 1, 2009
From: QAWAMI, SHEKOUFEH; ROZMAN, RODNEY R; EILERT, SEAN
To: INTEL CORPORATION
Reel/Frame 023313/0562 →
Assignment of Assignor's Interest Mar 9, 2010
From: WANG, HONGYU
To: INTEL CORPORATION
Reel/Frame 024053/0949 →
Assignment of Assignor's Interest May 24, 2012
From: MUHAMMAD, KHELLAH; SOMASEKHAR, DINESH; YE, YIBIN; KIM, NAM SUNG
To: INTEL CORPORATION
Reel/Frame 028267/0478 →
Assignment of Assignor's Interest Mar 27, 2013
From: SUNDARAM, RAJESH; ROZMAN, RODNEY R.; TALREJA, SANJAY S.
To: INTEL CORPORATION
Reel/Frame 030101/0847 →