IP Library Granted Patent US 9,285,404
Granted Patent B2
US 9,285,404 · App. 13/967,877 · Granted Mar 15, 2016

Test structure and methodology for estimating sensitivity of pressure sensors

Inventors: Chad S. Dawson (Queen Creek, AZ); Peter T. Jones (Scottsdale, AZ); Bruno J. Debeurre (Phoenix, AZ)
Assignee: Freescale Semiconductor, Inc.
G01R27/2605G01L9/0072G01L27/002G01L27/005B81B2201/0264
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Quick Facts
Patent No.
US 9,285,404
App. No.
13/967,877
Granted
Mar 15, 2016
Kind
B2
Abstract

A test structure includes two capacitor structures, wherein one of the capacitor structures has conductor plates spaced apart by a cavity, and the other capacitor structure does not include a cavity. Methodology entails forming the test structure and a pressure sensor on the same substrate using the same fabrication process techniques. Methodology for estimating the sensitivity of the pressure sensor includes detecting capacitances for each of the two capacitor structures and determining a ratio of the capacitances. A critical dimension of the cavity in one of the capacitor structures is estimated using the ratio, and the sensitivity of the pressure sensor is estimated using the critical dimension.

Claims (28)

1. A test structure comprising:

a first capacitor structure having a first conductor plate, a second conductor plate, and an electrical insulator layer interposed between and in contact with each of said first and said second conductor plates, said first capacitor structure producing a first capacitance; and

a second capacitor structure having a third conductor plate and a fourth conductor plate spaced apart by a cavity, said second capacitor structure producing a second capacitance, wherein a ratio of said second capacitance to said first capacitance is utilized to estimate a critical dimension of said cavity, wherein said first and second capacitor structures are formed on a substrate upon which a pressure sensor is formed, said pressure sensor includes a sense cell having a sense cavity, said sense cavity is characterized by a width, said critical dimension is proportional to said width of said sense cavity, and said critical dimension is utilized to estimate a sensitivity of said pressure sensor.

2. A test structure as claimed in claim 1 wherein said ratio is proportional to said critical dimension.

3. A test structure as claimed in claim 1 wherein said first capacitor structure does not include a cavity.

4. A test structure as claimed in claim 1 further comprising a cap layer over said fourth conductor plate of said second capacitor structure.

5. A test structure as claimed in claim 1 wherein said first and second capacitor structures are formed on said substrate such that said first conductor plate is interposed between said substrate and said electrical insulator layer, and said third conductor plate is interposed between said substrate and said cavity.

6. A test structure as claimed in claim 1 wherein said pressure sensor includes a sense cell having a first electrode and a second electrode, said first electrode being formed in a first structural layer, said second electrode being formed in a second structural layer, and:

said first and third conductor plates are formed in said first structural layer; and

said second and fourth conductor plates are formed in said second structural layer.

7. A test structure as claimed in claim 1 wherein said substrate includes a single pressure sensor and said first and second capacitor structures are formed on said substrate in association with said single pressure sensor.

8. A test structure as claimed in claim 1 wherein said substrate includes a plurality of pressure sensors, said pressure sensor being one of said plurality of pressure sensors, and said test structure is a single test structure in association with said plurality of pressure sensors.

9. A test structure as claimed in claim 1 wherein said substrate includes a plurality of pressure sensors laterally separated from one another by inactive regions, and said test structure is formed on said substrate in one of said inactive regions.

10. A method comprising:

forming a plurality of pressure sensors on a substrate, each of said pressure sensors including a sense cell having a first cavity; and

forming only one test structure on said substrate, said test structure including a first capacitor structure and a second capacitor structure, said first capacitor structure having a first conductor plate, a second conductor plate, and an electrical insulator layer interposed between and in contact with each of said first and said second conductor plates, said first capacitor structure being formed without a cavity, and said second capacitor structure having a third conductor plate and a fourth conductor plate spaced apart by a second cavity.

11. A method as claimed in claim 10 wherein:

a sense electrode of said each of said pressure sensors, said first conductor plate of said first capacitor structure, and said third conductor plate of said second capacitor structure are formed in a first structural layer; and

a diaphragm of said each of said pressure sensors, said second conductor plate of said first capacitor structure, and said fourth conductor plate of said second capacitor structure are formed in a second structural layer.

12. A method as claimed in claim 10 wherein said forming said test structure includes forming a cap layer over said fourth conductor plate of said second capacitor structure, said cap layer making said second capacitor structure insensitive to pressure.

13. A method comprising:

forming a plurality of pressure sensors on a substrate, each of said pressure sensors including a sense cell having a first cavity;

forming a plurality of test structures on said substrate, each of said test structures including a first capacitor structure and a second capacitor structure,

said first capacitor structure having a first conductor plate, a second conductor plate, and an electrical insulator layer interposed between and in contact with each of said first and said second conductor plates, said first capacitor structure being formed without a cavity, and said second capacitor structure having a third conductor plate and a fourth conductor plate spaced apart by a second cavity; and

separating said substrate into a plurality of dies, each of said dies including one of said pressure sensors and one of said test structures.

14. A method comprising:

forming a plurality of pressure sensors on a substrate laterally separated from one another by inactive regions, each of said pressure sensors including a sense cell having a first cavity; and

forming a test structure on said substrate, said test structure including a first capacitor structure and a second capacitor structure, said first capacitor structure having a first conductor plate, a second conductor plate, and an electrical insulator layer interposed between and in contact with each of said first and said second conductor plates, said first capacitor structure being formed without a cavity, and said second capacitor structure having a third conductor plate and a fourth conductor plate spaced apart by a second cavity, wherein said forming said test structure includes forming said test structure on said substrate in one of said inactive regions.

Assignments (27)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PCT NUMBERS IB2013000664, US2013051970, US201305935 PREVIOUSLY RECORDED AT REEL: 037444 FRAME: 0787. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Oct 17, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 040450/0715 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0787 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0874 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2013
From: DAWSON, CHAD S.; JONES, PETER T.; DEBEURRE, BRUNO J.
To: FREESCALE SEMICONDUCTOR, INC.
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Continuity (1)
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