Monolithic Group III-V and Group IV Device
According to one disclosed embodiment, a method for fabricating a monolithic integrated composite device comprises forming a group III-V semiconductor body over a group IV semiconductor substrate, forming a trench in the group III-V semiconductor body, and forming a group IV semiconductor body in the trench. The method also comprises fabricating at least one group IV semiconductor device in. the group IV semiconductor body, and fabricating at least one group III-V semiconductor device in the group III-V semiconductor body. In one embodiment, the method further comprises planarizing an upper surface of the III-V semiconductor body and an upper surface of the group IV semiconductor body to render those respective upper surfaces substantially co-planar. In one embodiment, the method further comprises fabricating at least one passive device in a defective region of said group IV semiconductor body adjacent to a side-wall of the trench.
1 . A method for fabricating a monolithic integrated composite device, the method comprising:
forming a group III-V semiconductor body over a group IV semiconductor substrate;
forming a trench in said group III-V semiconductor body;
forming a group IV semiconductor body in said trench;
fabricating at least one group IV semiconductor device in said group IV semiconductor body;
fabricating at least one group III-V semiconductor device in said group III-V semiconductor body, thereby forming a monolithic integrated composite device.
2 . The method of claim 1 , further comprising electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device.
3 . The method of claim 1 , further comprising planarizing an upper surface of said III-V semiconductor body and an upper surface of said group IV semiconductor body to render those respective upper surfaces substantially co-planar.
4 . The method of claim 1 , wherein said forming said group III-V semiconductor body over said group IV semiconductor substrate comprises forming a III-nitride semiconductor body over said group IV semiconductor substrate.
5 . The method of claim 1 , wherein said forming said group IV semiconductor body in said trench comprises epitaxially growing said group IV semiconductor body.
6 . The method of claim 1 , further comprising:
forming a first buried layer having a first conductivity type in said trench over said group IV semiconductor substrate; and
forming a second buried layer having a second conductivity type between said first buried layer and said group IV semiconductor body.
7 . The method of claim 1 , further comprising fabricating at least one passive device in at least one of first and second defective regions of said group IV semiconductor body adjacent to respective first and second sidewalls of said trench.
8 - 20 . (canceled)
21 . A method comprising:
forming a group III-V semiconductor body over a group IV semiconductor substrate;
forming a trench in said group III-V semiconductor body;
forming a group IV semiconductor body in said trench;
fabricating at least one passive device in a first defective region of said group IV semiconductor body adjacent to a first sidewall of said trench.
22 . The method of claim 21 , further comprising planarizing an upper surface of said III-V semiconductor body and an upper surface of said group IV semiconductor body to render those respective upper surfaces substantially co-planar.
23 . The method of claim 21 , wherein said forming said group III-V semiconductor body over said group IV semiconductor substrate comprises forming a III-nitride semiconductor body over said group IV semiconductor substrate.
24 . The method of claim 21 , wherein said forming said group IV semiconductor body in said trench comprises epitaxially growing said group IV semiconductor body.
25 . The method of claim 21 , further comprising:
forming a first buried layer having a first conductivity type in said trench over said group IV semiconductor substrate;
forming a second buried layer having a second conductivity type between said first buried layer and said group IV semiconductor body.
26 . The method of claim 21 , wherein said at least one passive device comprises a capacitor.
27 . A method comprising:
forming a group III-V semiconductor body over a group IV semiconductor substrate;
forming a trench in said group III-V semiconductor body;
forming a group IV semiconductor body in said trench;
fabricating at least one passive device in said trench.
28 . The method of claim 27 , further comprising planarizing an upper surface of said III-V semiconductor body and an upper surface of said group IV semiconductor body to render those respective upper surfaces substantially co-planar.
29 . The method of claim 27 , wherein said forming said group III-V semiconductor body over said group IV semiconductor substrate comprises forming a III-nitride semiconductor body over said group IV semiconductor substrate.
30 . The method of claim 27 , wherein said forming said group IV semiconductor body in said trench comprises epitaxially growing said group IV semiconductor body.
31 . The method of claim 27 , further comprising:
forming a first buried layer having a first conductivity type in said trench over said group IV semiconductor substrate;
forming a second buried layer having a second conductivity type between said first buried layer and said group IV semiconductor body.
32 . The method of claim 27 , wherein said at least one passive device comprises a capacitor.