IP Library Granted Patent US 9,117,744
Granted Patent B2
US 9,117,744 · App. 13/971,169 · Granted Aug 25, 2015

Methods of forming a span comprising silicon dioxide

Inventor: David H. Wells (Boise, ID)
Assignee: Micron Technology, Inc.
H01L21/2015H01L21/0265H01L21/02381H01L21/02488H01L21/02532H01L21/02639
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Quick Facts
Patent No.
US 9,117,744
App. No.
13/971,169
Granted
Aug 25, 2015
Kind
B2
Abstract

Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Claims (19)

1. A method of forming a span comprising silicon dioxide, comprising:

forming an opening comprising sidewalls within a semiconductor substrate;

relative to at least some portion of the sidewalls, selectively growing an elemental-form silicon-containing material to bridge across the opening to form a covered cavity within the opening; and

oxidizing all of the selectively grown elemental-form silicon-containing material which covers the opening to form a silicon dioxide-comprising bridge across the opening over the cavity.

2. The method of claim 1 comprising epitaxially growing an elemental-form silicon-comprising material from a base of the opening while selectively growing the elemental-form silicon-containing material to bridge across the opening.

3. The method of claim 1 wherein the selectively growing comprises epitaxially growing material which consists essentially of elemental-form monocrystalline silicon.

4. The method of claim 1 wherein the selectively growing comprises growing said elemental-form silicon-containing material from elemental-form silicon containing material.

5. The method of claim 4 comprising providing the elemental-form silicon-containing material from which the selectively growing occurs at uppermost opposing edges of the opening.

6. The method of claim 4 comprising providing the elemental-form silicon-containing material from which the selectively growing occurs spaced from uppermost opposing edges of the opening, with material other than elemental-form silicon-containing material covering the elemental-form silicon-containing material from which the selectively growing occurs.

7. The method of claim 1 wherein the selectively growing comprises growing said elemental-form silicon-containing material from at least one of elemental-form W or a silicide.

8. The method of claim 7 comprising providing the at least one of elemental-form W or a silicide from which the selectively growing occurs at uppermost opposing edges of the opening.

9. The method of claim 7 comprising providing the at least one of elemental-form W or a silicide from which the selectively growing occurs spaced from uppermost opposing edges of the opening, with material other than said at least one of elemental-form W and a silicide covering the at least one of elemental-form W and a silicide from which the selectively growing occurs.

10. The method of claim 7 wherein the at least one comprises elemental-form W.

11. The method of claim 7 wherein the at least one comprises a silicide.

12. The method of claim 1 comprising providing the opening to comprise an elongated trench running generally parallel a mean outermost global surface of the semiconductor substrate.

13. The method of claim 12 comprising filling at least a majority of the trench with conductive material and forming an elongated conductive line therefrom.

14. The method of claim 1 wherein the silicon dioxide-comprising bridge has a non-planar elevationally outermost surface.

15. The method of claim 1 wherein the silicon dioxide-comprising bridge has a planar elevationally innermost surface.

16. The method of claim 15 wherein the silicon dioxide-comprising bridge has a non-planar elevationally outermost surface.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (3)
Division 11724654 · Mar 14, 2007
Continuation 11704466 · Feb 7, 2007
Related Publication 20130337630A1 · Dec 19, 2013