Cost effective multiband RF front-end architecture for mobile applications

1. An RF front-end system, comprising:

one or more RF front-end components;

a programmable logic device having a baseband interface for coupling to a baseband digital signal processor (DSP), and a set of component interfaces for coupling to the one or more RF front-end components; and

an RF IC chip situated between the baseband DSP and the programmable logic device;

wherein the programmable logic device is configured to:

receive, from the baseband DSP via the baseband interface, a command, wherein the command includes an address and a control signal;

map the address included in the received command to a component interface from the set of component interfaces; and

send the control signal to the mapped component interface, thereby enabling the baseband DSP to control a front-end component coupled to the programmable logic device via the mapped component interface; and

wherein the RF IC chip is configured to:

receive, from the baseband DSP, a second command;

determine whether a second address included in the second command is within a predetermined range; and

in response to determining the second address being outside of the predetermined range, forward the second command to the programmable logic device.

2. The RF front-end system of claim 1 , wherein the baseband interface includes one of:

a serial peripheral interface (SPI);

an I2C interface;

a general purpose input/output interface; and

a serial one-wire interface.

3. The RF front-end system of claim 1 , wherein the programmable logic device includes at least one of:

a complex programmable logic device (CPLD);

a field-programmable gate array (FPGA); and

a programmable logic device (PLA).

4. The RF front-end system of claim 1 , wherein the set of component interfaces include one or more of:

a serial peripheral interface (SPI);

an I2C interface;

a general purpose input/output interface; and

a serial one-wire interface.

5. The RF front-end system of claim 1 , wherein the command includes at least one of: a write command and a read command.

6. The RF front-end system of claim 5 , wherein the programmable logic device is further configured to:

in response to the read command, obtain a status reading from the identified component interface for the front-end component; and

send the status reading to the baseband DSP via the baseband interface.

7. The RF front-end system of claim 1 , wherein the RF front-end components include one or more of:

one or more of integrated circuit (IC) chips;

a power management unit;

an antenna tuner;

a filter;

a band-selection switch;

an operation mode switch configured to switch between a time division duplex (TDD) mode and a frequency division duplex (FDD) mode;

a power amplifier;

a low-noise amplifier;

a power detector; and

an automatic gain control (AGC) circuitry.

8. The RF front-end system of claim 7 , wherein the RF front-end components include at least one transceiver IC chip.

9. The RF front-end system of claim 1 , wherein the programmable logic device further comprises an additional baseband interface to enable a slow write/read operation between the baseband DSP and the programmable logic device.

10. The RF front-end system of claim 1 , wherein the RF IC chip is further configured to:

in response to determining the second address being within the predetermined range, map the second address to an RF IC component within the RF IC chip; and

forward a control signal within the second command to the mapped RF IC component.