Strain-inducing semiconductor regions

1. A method of forming a semiconductor device, the method comprising:

forming a three-dimensional semiconductor structure above a substrate, the three-dimensional semiconductor structure comprising a first crystalline lattice of one or more species of charge-neutral lattice-forming atoms and having a first lattice constant;

forming a gate dielectric layer around a portion of the three-dimensional semiconductor structure;

forming a gate electrode around the gate dielectric layer;

removing a portion of the three-dimensional semiconductor structure on either side of the gate dielectric layer and the gate electrode to provide a three-dimensional channel region; and

forming a three-dimensional source region disposed laterally adjacent to a first end of the three-dimensional channel region and forming a three-dimensional drain region disposed laterally adjacent to a second end of the three-dimensional channel region, wherein the three-dimensional source and drain regions comprise a second crystalline lattice of one or more species of charge-neutral lattice-forming atoms and having a second lattice constant different from the first lattice constant, and wherein all species of charge-neutral lattice-forming atoms contained in the second crystalline lattice are contained in the first crystalline lattice.

2. The method of claim 1 , wherein the three-dimensional source and drain regions impart a uniaxial strain to the three-dimensional channel region, and wherein the three-dimensional channel region imparts a uniaxial strain to the three-dimensional source and drain regions.

3. The method of claim 1 , wherein the second lattice constant is different from the first lattice constant by a factor of at least 0.1%.

4. The method of claim 1 , wherein the first crystalline lattice comprises Si x Ge 1-x and the second crystalline lattice comprises Si y Ge 1-y , where 0≦x≦1 and x≠y.

5. The method of claim 4 , wherein y=1.

6. The method of claim 4 , wherein y=0.

7. The method of claim 1 , wherein the first crystalline lattice is selected from the group consisting of Al x Ga 1-x As, In x Ga 1-x As, In x Ga 1-x P and Al x In 1-x Sb, and the second crystalline lattice is selected from the group consisting of Al y Ga 1-y As, In y Ga 1-y As, In y Ga 1-y P and Al y In 1-y Sb, where 0≦x≦1 and x≠y.

8. A method of fabricating semiconductor device, the method comprising:

forming a semiconductor feature above a substrate;

forming a three-dimensional channel region in the semiconductor feature, the three-dimensional channel region comprising a first crystalline lattice of one or more species of charge-neutral lattice-forming atoms; and

forming a three-dimensional source region disposed laterally adjacent to a first end of the three-dimensional channel region and a three-dimensional drain region disposed laterally adjacent to a second end of the three-dimensional channel region, the three-dimensional source and drain regions comprising a second crystalline lattice of one or more species of charge-neutral lattice-forming atoms, wherein the lattice constant of the second crystalline lattice is different from the lattice constant of the first crystalline lattice, and wherein all species of charge-neutral lattice-forming atoms contained in the second crystalline lattice are contained in the first crystalline lattice.

9. The method of claim 8 , wherein the three-dimensional source and drain regions impart a uniaxial strain to the three-dimensional channel region, and wherein the three-dimensional channel region imparts a uniaxial strain to the three-dimensional source and drain regions.

10. The method of claim 8 , wherein the lattice constant of the second crystalline lattice is different from the lattice constant of the first crystalline lattice by a factor of at least 0.1%.