IP Library Granted Patent US 8,908,115
Granted Patent B2
US 8,908,115 · App. 13/974,328 · Granted Dec 9, 2014

Display device and electronic device

Inventors: Atsushi Umezaki (Kanagawa, JP); Hiroyuki Miyake (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/156G09G3/3426G09G3/3685G09G3/3233G09G2310/0262G09G2340/02H01L29/42384H01L27/1214G09G2310/0248G08G2300/0852G09G2310/0297G09G2330/021H01L27/12G09G2300/043G09G3/3275G09G3/2022G09G3/342
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Quick Facts
Patent No.
US 8,908,115
App. No.
13/974,328
Granted
Dec 9, 2014
Kind
B2
Abstract

An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

Claims (77)

1. A display device comprising:

a pixel; and

a driver circuit,

wherein the driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

wherein a first terminal of the first transistor is electrically connected to a fourth wiring, and a second terminal of the first transistor is electrically connected to a third wiring,

wherein a first terminal of the second transistor is electrically connected to a sixth wiring, and a second terminal of the second transistor is electrically connected to the third wiring,

wherein a first terminal of the third transistor is electrically connected to a seventh wiring, and a gate of the third transistor is electrically connected to the seventh wiring,

wherein a first terminal of the fourth transistor is electrically connected to the sixth wiring, and a gate of the fourth transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fifth transistor is electrically connected to a first wiring, a second terminal of the fifth transistor is electrically connected to the gate of the first transistor, and a gate of the fifth transistor is electrically connected to the first wiring,

wherein a first terminal of the sixth transistor is electrically connected to the sixth wiring, and a second terminal of the sixth transistor is electrically connected to the gate of the first transistor,

wherein a first terminal of the seventh transistor is electrically connected to the sixth wiring, a second terminal of the seventh transistor is electrically connected to the gate of the first transistor, and a gate of the seventh transistor is electrically connected to a second wiring,

wherein a first terminal of the eighth transistor is electrically connected to the sixth wiring, and a gate of the eighth transistor is electrically connected to the first wiring, and

wherein a value of a ratio W/L of a channel width W to a channel length L of the first transistor is the highest among values of W/L of the first to eighth transistors.

2. The display device according to claim 1 , wherein the value of the ratio W/L of the channel width W to the channel length L of the first transistor is twice to five times higher than the value of W/L of the fifth transistor.

3. The display device according to claim 1 , wherein a channel length L of the third transistor is larger than a channel length L of the fourth transistor.

4. The display device according to claim 1 , wherein a capacitor is provided between the second terminal and the gate of the first transistor.

5. The display device according to claim 1 , wherein the first to eighth transistors are n-channel transistors.

6. The display device according to claim 1 , wherein the display device is one of a liquid crystal display device and an EL display device.

7. The display device according to claim 1 , wherein the display device is incorporated in one selected from the group consisting of a camera, a computer, an image reproducing device, a goggle-type display, and a game machine.

8. The display device according to claim 1 , wherein a second terminal of the third transistor is electrically connected to a gate of the second transistor, a second terminal of the fourth transistor is electrically connected to the gate of the second transistor, a gate of the sixth transistor is electrically connected to the gate of the second transistor, and a second terminal of the eighth transistor is electrically connected to the gate of the second transistor.

9. A mobile phone comprising:

a main body and a battery; and

a display panel, the display panel including a pixel and a driver circuit,

wherein the driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

wherein a first terminal of the first transistor is electrically connected to a fourth wiring, and a second terminal of the first transistor is electrically connected to a third wiring,

wherein a first terminal of the second transistor is electrically connected to a sixth wiring, and a second terminal of the second transistor is electrically connected to the third wiring,

wherein a first terminal of the third transistor is electrically connected to a seventh wiring, and a gate of the third transistor is electrically connected to the seventh wiring,

wherein a first terminal of the fourth transistor is electrically connected to the sixth wiring, and a gate of the fourth transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fifth transistor is electrically connected to a first wiring, a second terminal of the fifth transistor is electrically connected to the gate of the first transistor, and a gate of the fifth transistor is electrically connected to the first wiring,

wherein a first terminal of the sixth transistor is electrically connected to the sixth wiring, and a second terminal of the sixth transistor is electrically connected to the gate of the first transistor,

wherein a first terminal of the seventh transistor is electrically connected to the sixth wiring, a second terminal of the seventh transistor is electrically connected to the gate of the first transistor, and a gate of the seventh transistor is electrically connected to a second wiring,

wherein a first terminal of the eighth transistor is electrically connected to the sixth wiring, and a gate of the eighth transistor is electrically connected to the first wiring, and

wherein a value of a ratio W/L of a channel width W to a channel length L of the first transistor is the highest among values of W/L of the first to eighth transistors.

10. The mobile phone according to claim 9 , wherein the value of the ratio W/L of the channel width W to the channel length L of the first transistor is twice to five times higher than the value of W/L of the fifth transistor.

11. The mobile phone according to claim 9 , wherein a channel length L of the third transistor is larger than a channel length L of the fourth transistor.

12. The mobile phone according to claim 9 , wherein a capacitor is provided between the second terminal and the gate of the first transistor.

13. The mobile phone according to claim 9 , wherein the first to eighth transistors are n-channel transistors.

14. The mobile phone according to claim 9 , wherein a second terminal of the third transistor is electrically connected to a gate of the second transistor, a second terminal of the fourth transistor is electrically connected to the gate of the second transistor, a gate of the sixth transistor is electrically connected to the gate of the second transistor, and a second terminal of the eighth transistor is electrically connected to the gate of the second transistor.

15. A display device comprising:

a pixel; and

a driver circuit,

wherein the driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

wherein a first terminal of the first transistor is electrically connected to a fourth wiring, and a second terminal of the first transistor is electrically connected to a third wiring,

wherein a first terminal of the second transistor is electrically connected to a sixth wiring, and a second terminal of the second transistor is electrically connected to the third wiring,

wherein a first terminal of the third transistor is electrically connected to a seventh wiring, and a gate of the third transistor is electrically connected to the seventh wiring,

wherein a first terminal of the fourth transistor is electrically connected to the sixth wiring, and a gate of the fourth transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fifth transistor is electrically connected to a first wiring, a second terminal of the fifth transistor is electrically connected to the gate of the first transistor, and a gate of the fifth transistor is electrically connected to the first wiring,

wherein a first terminal of the sixth transistor is electrically connected to the sixth wiring, and a second terminal of the sixth transistor is electrically connected to the gate of the first transistor,

wherein a first terminal of the seventh transistor is electrically connected to the sixth wiring, a second terminal of the seventh transistor is electrically connected to the gate of the first transistor, and a gate of the seventh transistor is electrically connected to a second wiring,

wherein a first terminal of the eighth transistor is electrically connected to the sixth wiring, and a gate of the eighth transistor is electrically connected to the first wiring,

wherein a value of a ratio W/L of a channel width W to a channel length L of the first transistor is the highest among values of W/L of the first to eighth transistors, and wherein each of the first to eighth transistors contains an InGaZnO layer.

16. The display device according to claim 15 , wherein the value of the ratio W/L of the channel width W to the channel length L of the first transistor is twice to five times higher than the value of W/L of the fifth transistor.

17. The display device according to claim 15 , wherein a channel length L of the third transistor is larger than a channel length L of the fourth transistor.

18. The display device according to claim 15 , wherein a capacitor is provided between the second terminal and the gate of the first transistor.

19. The display device according to claim 15 , wherein the first to eighth transistors are n-channel transistors.

20. The display device according to claim 15 , wherein the display device is one of a liquid crystal display device and an EL display device.

21. The display device according to claim 15 , wherein the display device is incorporated in one selected from the group consisting of a camera, a computer, an image reproducing device, a goggle-type display, and a game machine.

22. The display device according to claim 15 , wherein a second terminal of the third transistor is electrically connected to a gate of the second transistor, a second terminal of the fourth transistor is electrically connected to the gate of the second transistor, a gate of the sixth transistor is electrically connected to the gate of the second transistor, and a second terminal of the eighth transistor is electrically connected to the gate of the second transistor.

23. A mobile phone comprising:

a main body and a battery; and

a display panel, the display panel including a pixel and a driver circuit,

wherein the driver circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

wherein a first terminal of the first transistor is electrically connected to a fourth wiring, and a second terminal of the first transistor is electrically connected to a third wiring,

wherein a first terminal of the second transistor is electrically connected to a sixth wiring, and a second terminal of the second transistor is electrically connected to the third wiring,

wherein a first terminal of the third transistor is electrically connected to a seventh wiring, and a gate of the third transistor is electrically connected to the seventh wiring,

wherein a first terminal of the fourth transistor is electrically connected to the sixth wiring, and a gate of the fourth transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fifth transistor is electrically connected to a first wiring, a second terminal of the fifth transistor is electrically connected to the gate of the first transistor, and a gate of the fifth transistor is electrically connected to the first wiring,

wherein a first terminal of the sixth transistor is electrically connected to the sixth wiring, and a second terminal of the sixth transistor is electrically connected to the gate of the first transistor,

wherein a first terminal of the seventh transistor is electrically connected to the sixth wiring, a second terminal of the seventh transistor is electrically connected to the gate of the first transistor, and a gate of the seventh transistor is electrically connected to a second wiring,

wherein a first terminal of the eighth transistor is electrically connected to the sixth wiring, and a gate of the eighth transistor is electrically connected to the first wiring,

wherein a value of a ratio W/L of a channel width W to a channel length L of the first transistor is the highest among values of W/L of the first to eighth transistors, and

wherein each of the first to eighth transistors contains an InGaZnO layer.

24. The mobile phone according to claim 23 , wherein the value of the ratio W/L of the channel width W to the channel length L of the first transistor is twice to five times higher than the value of W/L of the fifth transistor.

25. The mobile phone according to claim 23 , wherein a channel length L of the third transistor is larger than a channel length L of the fourth transistor.

26. The mobile phone according to claim 23 , wherein a capacitor is provided between the second terminal and the gate of the first transistor.

27. The mobile phone according to claim 23 , wherein the first to eighth transistors are n-channel transistors.

28. The mobile phone according to claim 23 , wherein a second terminal of the third transistor is electrically connected to a gate of the second transistor, a second terminal of the fourth transistor is electrically connected to the gate of the second transistor, a gate of the sixth transistor is electrically connected to the gate of the second transistor, and a second terminal of the eighth transistor is electrically connected to the gate of the second transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: UMEZAKI, ATSUSHI; MIYAKE, HIROYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 032632/0221 →
Priority Claims (1)
JP 2006-269905 · Sep 29, 2006 · national
Continuity (3)
Continuation 13174895 · Jul 1, 2011
Continuation 11853215 · Sep 11, 2007
Related Publication 20130341616A1 · Dec 26, 2013