IP Library Granted Patent US 9,129,800
Granted Patent B2
US 9,129,800 · App. 14/006,378 · Granted Sep 8, 2015

Manufacturing method for a semiconductor on insulator type substrate for radiofrequency applications

Inventors: Frédéric Allibert (Grenoble, FR); Julie Widiez (Grenoble, FR)
Assignees: Soitec; Commissariat A L'Energie Atomique et aux Energies Alternatives
H01L21/02381H01L21/02052H01L21/76254H01L29/04H01L29/06
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Quick Facts
Patent No.
US 9,129,800
App. No.
14/006,378
Granted
Sep 8, 2015
Kind
B2
Abstract

The invention relates to a method for manufacturing a semiconductor on insulator type substrate for radio frequency applications, comprising the following steps in sequence: (a) provision of a silicon substrate with an electrical resistivity of more than 500 Ohm.cm, (b) formation of a polycrystalline silicon layer on the substrate, the method comprising a step between steps a) and b) to form a dielectric material layer, different from a native oxide layer, on the substrate, between 0.5 and 10 nm thick.

Claims (12)

1. A method for manufacturing a semiconductor on insulator type substrate, comprising the following steps in sequence:

(a) providing a silicon substrate with an electrical resistivity of more than 500 Ohm.cm,

(b) forming a dielectric material layer different from a native oxide layer on the silicon substrate, the thickness of the dielectric material layer being between 0.5 and 10 nm,

(c) forming a polycrystalline silicon layer on the silicon substrate, and

(d) subjecting the silicon substrate, the dielectric material layer and the polycrystalline silicon layer to a heat treatment wherein the dielectric material layer is at least partially dissolved during the heat treatment.

2. The method of claim 1 , further comprising the following steps in sequence after step (c):

(c1) forming a dielectric material layer on the polycrystalline silicon layer and/or on a semiconducting material layer of a donor substrate,

(c2) bonding the substrate obtained in step (c) on the donor substrate, the dielectric layer(s) formed in step (c1) being at the interface,

(c3) separating the semiconducting material layer from the donor substrate.

3. The method of claim 1 , wherein a concentration of doping agents in the polycrystalline silicon layer is less than or equal to 10 16 cm −3 , and preferably less than or equal to 10 14 cm −3 .

4. The method of claim 1 , wherein the polycrystalline silicon layer is between 100 and 10000 nm thick, and preferably between 300 and 3000 nm.

5. The method of claim 1 , wherein the dielectric material layer formed between the substrate and the polycrystalline silicon layer is silicon oxide.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2013
From: ALLIBERT, FREDERIC
To: SOITEC
Reel/Frame 031697/0935 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2013
From: WIDIEZ, JULIE
To: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Reel/Frame 031697/0989 →
Priority Claims (1)
FR 11 52355 · Mar 22, 2011 · national
Continuity (1)
Related Publication 20140084290A1 · Mar 27, 2014