IP Library Granted Patent US 8,999,844
Granted Patent B2
US 8,999,844 · App. 14/015,696 · Granted Apr 7, 2015

Apparatuses including stair-step structures and methods of forming the same

Inventors: Eric H. Freeman (Kuna, ID); Michael A. Smith (Boise, ID)
Assignee: Micron Technology, Inc.
H01L21/76892H01L27/11548H01L27/11556H01L27/11575H01L27/11582H01L21/76838H01L23/528
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Quick Facts
Patent No.
US 8,999,844
App. No.
14/015,696
Granted
Apr 7, 2015
Kind
B2
Abstract

Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each of which including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.

Claims (38)

1. A method of forming a semiconductor structure, comprising:

forming a stack of conductive materials over a substrate wherein adjacent conductive materials of the stack are separated from each other by a respective insulating material;

forming first contact regions over portions of the conductive materials to form a stair step structure extending from a top first contact region to a bottom first contact region; and

removing portions of half of the conductive materials of the stack to form second contact regions, each of the second contact regions being offset from a corresponding first contact region and adjacent to the corresponding first contact region in a direction perpendicular to a direction in which the stair step structure extends, a topmost second contact region being farther from the substrate than all but a topmost first contact region.

2. The method of claim 1 , wherein forming first contact regions over portions of the conductive materials to form a stair step structure comprises:

forming a mask over a topmost insulating material of the stack;

removing a portion of the mask to expose a portion of the topmost insulating material;

removing at least the exposed portion of the topmost insulating material and a portion of the conductive material under the exposed portion of the topmost insulating material;

removing another portion of the mask to expose another portion of the topmost insulating material, the another portion of the topmost insulating material adjacent to the removed portion of the topmost insulating material of the stack; and

repeating the removing a portion of the mask and removing at least the exposed portion of the topmost insulating material and a portion of the conductive material under the exposed portion of the topmost insulating material until the first contact regions and stair step structure are formed, each of the first contact regions forming the stair step structure being offset from other first contact regions forming the stair step structure.

3. The method of claim 1 , wherein removing portions of half of the conductive materials of the stack to form second contact regions comprises:

forming a mask over a first portion of the stair step structure; and

removing portions of the half of the conductive materials in a second, exposed portion of the stair step structure.

4. The method of claim 1 , further comprising:

forming third contact regions, each of the third contact regions being offset from a corresponding first contact region; and

forming fourth contact regions, each of the fourth contact regions being offset from a corresponding second contact region.

5. The method of claim 4 , further comprising:

forming at least one mask covering a portion of the first contact regions and a portion of at least one of the second contact regions, third contact regions, and fourth contact regions; and

removing exposed portions of the conductive materials of the stack.

6. The method of claim 1 , further comprising contacting the first contact regions and the second contact regions with respective conductive contacts.

7. The method of claim 1 , wherein removing portions of half of the conductive materials of the stack comprises removing portions of half of the insulating materials of the stack.

8. An apparatus, comprising:

a first stair step structure comprising first contact regions defined by a first portion of stacked conductive materials, the first stair step structure extending in a first direction from a top first contact region to a bottom first contact region; and

a second stair step structure adjacent to the first stair step structure in a second direction perpendicular to the first direction, the second stair step structure comprising second contact regions defined by a second portion of the stacked conductive materials,

wherein a top second contact region of the second stair step structure is lower than the top first contact region and higher than all other contact regions of the first contact regions and second contact regions.

9. The apparatus of claim 8 , wherein the first stair step structure and the second stair step structure comprise steps, and each of the steps of the first stair step structure and of the second stair step structure comprises a contact region.

10. The apparatus of claim 8 , further comprising an insulating material between adjacent conductive materials of the stacked conductive materials.

11. The apparatus of claim 8 , wherein each of the first contact regions is offset from a corresponding second contact region.

12. The apparatus of claim 8 , further comprising:

a third stair step structure adjacent to the second stair step structure in the second direction, the third stair step structure comprising third contact regions defined by a third portion of the stacked conductive materials; and

a fourth stair step structure adjacent to the third stair step structure in the second direction, the fourth stair step structure comprising fourth contact regions defined by a fourth portion of the stacked conductive materials.

13. The apparatus of claim 12 , wherein each of the first contact regions is offset from a corresponding third contact region and each of the second contact regions is offset from a corresponding fourth contact region.

14. The apparatus of claim 8 , further comprising conductive contacts respectively contacting the first contact regions and the second contact regions.

15. An apparatus, comprising:

first contact regions comprising respective conductive materials, the first contact regions defining a first stair step structure, wherein each of the first contact regions defines a step of the first stair step structure, the first stair step structure having steps ascending in a first direction; and

second contact regions adjacent to the first contact regions in a second direction perpendicular to the first direction, the second contact regions comprising respective conductive materials, the second contact regions defining a second stair step structure, wherein each of the second contact regions comprises a step of the second stair step structure and wherein a topmost step of the second stair step structure is higher than all but a topmost step of the first stair step structure in a third direction perpendicular to a top surface of a step of the second stair step structure.

16. The apparatus of claim 15 , wherein each step of the first stair step structure and the second stair step structure is separated from a next ascending step by an insulating material.

17. The apparatus of claim 15 , wherein each step of the first stair step structure is adjacent to and offset from a corresponding step of the second stair step structure.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 13151892 · Jun 2, 2011
Related Publication 20130341798A1 · Dec 26, 2013