SELF-ALIGNED STRUCTURE FOR BULK FinFET

1 . A FinFET structure comprising:

a bulk semiconductor substrate;

a plurality of semiconductor fins extending from the bulk semiconductor substrate, each of the plurality of semiconductor fins having a top portion and a bottom portion such that the bottom portion of the semiconductor fins is doped and the top portion of the semiconductor fins is undoped;

a portion of the bulk semiconductor substrate directly underneath the plurality of semiconductor fins being doped to form an n+ or p+ well; and

an oxide formed between the bottom portions of the fins.

2 . The FinFET structure of claim 1 wherein the bottom portion of each of the plurality of semiconductor fins is thinned compared to the top portion of the plurality of semiconductor fins.

3 . The FinFET structure of claim 2 wherein a parasitic capacitance of the FinFET structure is reduced due to the thinned bottom portion of each of the plurality of semiconductor fins.

4 . The FinFET structure of claim 1 wherein the semiconductor fins and bulk semiconductor substrate are silicon.

5 . The FinFET structure of claim 1 further comprising a gate that wraps around at least one of the semiconductor fins.

6 . The FinFET structure of claim 1 wherein each of the plurality of semiconductor fins has a source and a drain and wherein the well blocks the electrical path between the source and drain and minimizes junction leakage current.

7 . The FinFET structure of claim 1 wherein the oxide is only in contact with the bulk semiconductor substrate and the bottom portions of the fins.

8 . The FinFET structure of claim 1 wherein the oxide is only in contact with the doped portion of the bulk semiconductor substrate and the doped portion of the fins.