Hard mask edge cover scheme
A method includes forming at least one trench in a dielectric layer using a hard mask. An edge cover layer is formed over the hard mask. The at least one trench is filled with a metal layer.
1. A method, comprising:
forming a patterned hard mask over a dielectric layer;
etching at least one trench in the dielectric layer using the hard mask, wherein a recess is formed between a sidewall of the patterned hard mask and a sidewall of the trench;
forming an edge cover layer over the hard mask, the edge cover filling the recess; and
filling the at least one trench with a metal layer.
2. The method of claim 1 , wherein a first sidewall of the edge cover layer is generally aligned with a second sidewall of the at least one trench.
3. The method of claim 1 , further comprising forming a seed layer over the at least one trench prior to filling.
4. The method of claim 1 , further comprising performing a polishing process.
5. The method of claim 1 , wherein the edge cover layer is formed by a selective deposition process.
6. The method of claim 5 , wherein the selective deposition process comprises a chemical vapor deposition (CVD), a physical vapor deposition (PVD), or atomic layer deposition (ALD).
7. The method of claim 1 , further comprising performing a plasma surface treatment of the dielectric layer and the hard mask.
8. The method of claim 7 , wherein the plasma surface treatment uses H 2 , O 2 , Ar, NH 3 , or any combination thereof.
9. The method of claim 1 , further comprising plasma etching the edge cover layer.
10. The method of claim 9 , wherein the plasma etching uses H 2 , O 2 , Ar, NH 3 , or any combination thereof.
11. The method of claim 1 , wherein the edge cover layer comprises Co, Cu, W, Al, Mn, Ru, Ta, or any combination thereof.
12. The method of claim 1 , further comprising forming the hard mask over the dielectric layer by a process selected from the group consisting of physical vapor deposition, chemical vapor deposition, and sputtering.
13. A method, comprising:
forming at least one trench in a dielectric layer using a hard mask;
forming an edge cover layer over the hard mask by a selective deposition process, wherein the edge cover extends over the hard mask but does not extend into the trench;
filling the at least one trench with a metal layer; and
performing a polishing process.
14. The method of claim 13 , further comprising forming a seed layer over the at least one trench prior to filling.
15. The method of claim 13 , further comprising performing a plasma surface treatment of the dielectric layer and the hard mask.
16. The method of claim 13 , further comprising plasma etching the edge cover layer.
17. The method of claim 13 , further comprising forming the hard mask over the dielectric layer.
18. The method of claim 13 , wherein the selective deposition process comprises a chemical vapor deposition (CVD), a physical vapor deposition (PVD), or atomic layer deposition (ALD).
19. The method of claim 13 , wherein the selective deposition process is performed at a temperature ranging from a room temperature to 400° C.
20. A method, comprising:
forming a hard mask over a dielectric layer;
forming at least one trench in the dielectric layer using the hard mask;
forming an edge cover layer over the hard mask by a selective deposition process;
forming a seed layer over the at least one trench;
filling the at least one trench with a metal layer; and
performing a polishing process.