Metal gate transistor
A metal gate transistor is disclosed. The metal gate transistor includes a substrate, a metal gate on the substrate, and a source/drain region in the substrate. The metal gate further includes a high-k dielectric layer, a bottom barrier metal (BBM) layer on the high-k dielectric layer, a first work function layer on the BBM layer, a second work function layer between the BBM layer and the first work function layer, and a low resistance metal layer on the first work function layer. Preferably, the first work function layer includes a p-type work function layer and the second work function layer includes a n-type work function layer.
1. A metal gate transistor, comprising:
a substrate;
a metal gate on the substrate, wherein the metal gate comprises:
a high-k dielectric layer;
a bottom barrier metal (BBM) layer on the high-k dielectric layer, wherein the BBM layer comprises TiSiN;
a first work function layer on the BBM layer;
a second work function layer between the BBM layer and the first work function layer, wherein the first work function layer comprises a p-type work function layer and the second work function layer comprises a n-type work function layer; and
a low resistance metal layer on the first work function metal layer;
a source/drain region in the substrate adjacent to the metal gate.
2. The metal gate transistor of claim 1 , further comprising a spacer around the metal gate.
3. The metal gate transistor of claim 1 , wherein the metal gate transistor comprises a PMOS transistor.
4. The metal gate transistor of claim 3 , wherein the first work function layer comprises a p-type work function layer.
5. The metal gate transistor of claim 1 , wherein the metal gate transistor comprises a NMOS transistor.
6. The metal gate transistor of claim 1 , wherein the high-k dielectric layer is U-shaped.