IP Library Granted Patent US 9,099,559
Granted Patent B2
US 9,099,559 · App. 14/027,758 · Granted Aug 4, 2015

Method to induce strain in finFET channels from an adjacent region

Inventors: Pierre Morin (Albany, NY); Nicolas Loubet (Guilderland, NY)
Assignee: STMICROELECTRONICS, INC.
H01L29/7843H01L29/16H01L29/1608H01L29/66795H01L29/785
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Quick Facts
Patent No.
US 9,099,559
App. No.
14/027,758
Granted
Aug 4, 2015
Kind
B2
Abstract

Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate. A first thin, strained, epitaxial layer may be cut to form strain-relieved base structures for fins. The base structures may be constrained in a strained-relieved state. Fin structures may be epitaxially grown in a second layer over the base structures. The constrained base structures can cause higher amounts of strain to form in the epitaxially-grown fins than would occur for non-constrained base structures.

Claims (16)

1. A finFET comprising:

a substrate;

a strain-inducing base structure vertically above the substrate, the strain-inducing base structure comprising a first semiconductor material having a first lattice constant;

a constraining material laterally adjacent the strain-inducing base structure, the constraining material having a Young's modulus higher than a Young's modulus of the strain inducing base structure; and

a fin vertically above the strain-inducing base structure and comprising a second semiconductor material having a second lattice constant that is different than the first lattice constant.

2. The finFET structure of claim 1 , wherein the first semiconductor material comprises SiGe or SiC.

3. The finFET structure of claim 2 , wherein a Ge or C content of the SiGe or SiC is between approximately 10% and approximately 25%.

4. The finFET structure of claim 2 , wherein a Ge or C content of the SiGe or SiC is between approximately 25% and approximately 40%.

5. The finFET structure of claim 2 , wherein the first semiconductor material has a gradient in Ge or C concentration in a direction perpendicular to an interfacial surface between the strain-inducing feature and the fin.

6. The finFET structure of claim 1 , wherein the second semiconductor material comprises Si.

7. The finFET structure of claim 1 , wherein a thickness of the first semiconductor material is between approximately 10 nm and approximately 60 nm.

8. The finFET structure of claim 1 , wherein a thickness of the second semiconductor material is between approximately 10 nm and approximately 60 nm.

9. The finFET structure of claim 1 , wherein the fin has a width between approximately 5 nm and approximately 30 nm.

10. The finFET structure of claim 9 , further comprising a gate structure formed at a center region of the fin.

11. The finFET structure of claim 10 disposed in a smart phone, computer, tablet computer, PDA, or video display.

12. The finFET structure of claim 1 , wherein the Young's modulus of the constraining material is at least twice the value of the Young's modulus of the strain-inducing base structure.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2021
From: STMICROELECTRONICS INTERNATIONAL N.V.
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 058298/0235 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2021
From: STMICROELECTRONICS, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 057791/0514 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2013
From: MORIN, PIERRE; LOUBET, NICOLAS
To: STMICROELECTRONICS, INC.
Reel/Frame 031218/0220 →
Continuity (1)
Related Publication 20150076514A1 · Mar 19, 2015