IP Library Granted Patent US 9,054,150
Granted Patent B2
US 9,054,150 · App. 14/032,437 · Granted Jun 9, 2015

Chip edge sealing

Inventors: Markus Zundel (Egmating, DE); Gabriela Brase (Unterhaching, DE); Peter Nelle (Munich, DE); Guenther Schindler (Munich, DE)
Assignee: Infineon Technologies AG
H01L29/7393H01L29/407H01L29/7811H01L29/7813H01L29/0657H01L23/3178H01L23/3192H01L2924/0002
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Quick Facts
Patent No.
US 9,054,150
App. No.
14/032,437
Granted
Jun 9, 2015
Kind
B2
Abstract

The invention relates to a semiconductor component comprising a semiconductor body, an insulation on the semiconductor body and a cell array arranged at least partly within the semiconductor body. The cell array has at least one p-n junction and at least one contact connection. The insulation is bounded in lateral direction of the semiconductor body by a circumferential diffusion barrier.

Claims (27)

1. A semiconductor component comprising:

a semiconductor body;

an insulation on the semiconductor body; and

a cell array which is at least partly within the semiconductor body and comprises at least one p-n junction and at least one contact connection,

wherein a cell region of the insulation on the semiconductor body is bounded in lateral direction of the semiconductor body by a circumferential diffusion barrier.

2. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier runs continuously around the circumference of the cell array.

3. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier is arranged between the cell array and a lateral edge of the semiconductor component.

4. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier comprises silicon nitride.

5. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier comprises an imide.

6. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier is in contact with the semiconductor body in a region between the cell array and a lateral edge of the semiconductor component.

7. The semiconductor component of claim 6 , wherein the circumferential diffusion barrier ends before the lateral edge.

8. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier in an edge region covers the semiconductor body in a horizontal direction.

9. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier comprises a trench which cuts through the insulation and divides it into the cell region and an edge region.

10. The semiconductor component of claim 1 , wherein the insulation comprises a silicon dioxide.

11. The semiconductor component of claim 1 , wherein the circumferential diffusion barrier covers the cell region of the insulation in vertical direction of the semiconductor body.

12. The semiconductor component of claim 1 , wherein the cell region of the insulation is fully surrounded by diffusion-stopping elements.

13. The semiconductor component of claim 6 , wherein the circumferential diffusion barrier projects into a region below a surface of the semiconductor body in the cell array.

14. The semiconductor component of claim 13 , wherein the semiconductor body in a lateral region has a recess which runs up to the lateral edge.

15. The semiconductor component of claim 9 , wherein the trench projects into the semiconductor body.

16. The semiconductor component of claim 9 , wherein the trench comprises at least one trench edge composed of silicon nitride.

17. The semiconductor component of claim 12 , wherein a plurality of the diffusion-stopping elements are arranged overlapping one another.

18. The semiconductor component of claim 9 , wherein the trench has been filled with an imide.

19. A field-effect-controlled semiconductor element comprising:

a semiconductor body;

an insulation on at least one side of the semiconductor body; and

a cell array which is at least partly within the semiconductor body and comprises at least one p-n junction and at least one contact connection, and wherein the cell array comprises at least one gate electrode electrically insulated from the semiconductor body by at least one gate section of the insulation,

wherein a diffusion barrier separates the insulation on the semiconductor body between the gate section of the insulation and a lateral edge of the field-effect-controlled semiconductor component in lateral direction of the semiconductor body.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2013
From: ZUNDEL, MARKUS; BRASE, GABRIELA; NELLE, PETER; SCHINDLER, GUENTHER
To: INFINEON TECHNOLOGIES AG
Reel/Frame 031788/0374 →
Priority Claims (1)
DE 10 2012 018 611 · Sep 20, 2012 · national
Continuity (1)
Related Publication 20140077262A1 · Mar 20, 2014