IP Library › Granted Patent US 9,547,597
Granted Patent B2
US 9,547,597 · App. 14/036,195 · Granted Jan 17, 2017

Selection of post-request action based on combined response and input from the request source

Inventors: Bartholomew Blaner (Underhill Center, VT); David W. Cummings (Round Rock, TX); Brian Flachs (Georgetown, TX); Michael S. Siegel (Raleigh, NC); Jeffrey A. Stuecheli (Austin, TX)
Assignee: International Business Machines Corporation
G06F12/0831G06F12/0815
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Quick Facts
Patent No.
US 9,547,597
App. No.
14/036,195
Granted
Jan 17, 2017
Kind
B2
Abstract

A data structure includes a plurality of entries each corresponding to a different systemwide combined response of a data processing system. A particular entry includes identifiers of multiple possible actions that can be taken in response to a systemwide combined response. Master logic issues a memory access request on a system fabric of the data processing system. The master logic, responsive to receiving the systemwide combined response and a selection of one of the multiple possible actions from a source of the memory access request prior to receipt of the systemwide combined response, selects the particular entry based on the systemwide combined response and selects one of the multiple possible actions identified in the particular entry based on the received selection. The master logic services the memory access request in accordance with the systemwide combined response by performing the selected one of the multiple possible actions.

Claims (24)

1. A method of implementing a snoop-based coherence protocol in a data processing system, the method comprising:

within a combined response data structure having a plurality of entries storing identifiers of actions that can be taken in response to different ones of a plurality of types of systemwide combined response of the data processing system, storing, in a particular entry among the plurality of entries, identifiers of multiple possible actions to be taken in response to a particular type of systemwide combined response among the plurality of types of systemwide combined responses;

master logic issuing a memory access request on a system fabric of the data processing system;

in response to the master logic receiving a systemwide combined response of the particular type in response to the memory access request and in response to the master logic receiving a selection of one of the multiple possible actions for the memory access request from a source of the memory access request prior to receipt of the systemwide combined response of the memory access request, the master logic selecting the particular entry based on the particular type of the systemwide combined response and selecting one of the multiple possible actions identified in the particular entry based on the received selection; and

the master logic servicing the memory access request in accordance with the particular type of the systemwide combined response, wherein the servicing includes performing the selected one of the multiple possible actions.

2. The method of claim 1 , wherein the selection comprises an index into a field of the particular entry.

3. The method of claim 1 , and further comprising response logic computing the systemwide combined response by combining partial responses of a plurality of snoopers in the data processing system.

4. The method of claim 1 , wherein:

the data processing system includes a primary coherent system, an attached processor (AP) external to the primary coherent system, and a coherent attached processor proxy (CAPP) within the primary coherent system that participates in coherent communication within the primary coherent system on behalf of the AP;

the CAPP includes the master logic; and

the method further comprises receiving the selection from the AP.

5. The method of claim 1 , and further comprising:

in response to receiving the systemwide combined response to the memory access request and in response to the master logic not receiving a selection of one of the multiple possible actions for the memory access request prior to receipt of the systemwide combined response, the master logic selecting a default action among the multiple possible actions.

6. The method of claim 1 , wherein:

the particular memory access request requests access to a target cache line;

the multiple possible actions include updating a coherence state of the target cache line in a cache directory to an alternative coherence state that differs from a default coherence state associated with the particular type of the systemwide combined response.

7. The method of claim 6 , wherein:

the default coherence state is an owner coherence state that confers authority to the master logic to update the target cache line; and

the alternative coherence state does not confer authority to the master logic to update the target cache line.

8. The method of claim 1 , wherein:

each of the plurality of entries includes an internal combined response field; and

the method further comprises:

translating the systemwide combined response into an internal combined response by reference to the internal combined response field of the particular entry; and

supplying the internal combined response to a master state machine within the master logic responsible for managing the memory access request.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2013
From: BLANER, BARTHOLOMEW; CUMMINGS, DAVID W.; FLACHS, BRIAN; SIEGEL, MICHAEL S.; STUECHELI, JEFFREY A.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031275/0209 →
Continuity (2)
Continuation 13781932 · Mar 1, 2013
Related Publication 20140250276A1 · Sep 4, 2014