Integrated circuit and code generating method
An integrated circuit and a code generating method are described. The integrated circuit includes a plurality of field effect transistors, a plurality of sense-amplifiers, and a processing circuit. Each field effect transistor is configured to represent an address in a mapping table and includes a source, a drain, a channel and a gate. Each sense-amplifier is connected to the drain and configured to sense an electric current from the drain and identify a threshold voltage of the corresponding field effect transistor. The processing circuit is configured to categorize each of the threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each of the threshold voltages at the corresponding address in the mapping table.
1. An integrated circuit, comprising:
at least one first input/output end;
at least one current path, connected with the first input/output end;
at least one control end, disposed above the at least one current path, configured to apply a plurality of control end voltages on the at least one current path; and
at least one second input/output end, connected with the current path;
at least one sense-amplifier, connected with the at least one second input/output end, configured to sense a plurality of threshold voltages corresponding to the at least one control end; and
a processing circuit, configured to categorize each of the threshold voltages into a plurality of states,
wherein, the width and the thickness of the current path are defined according to the de Broglie length (DBL), and the length of the current path is longer than the width and the thickness of the current path,
wherein the width and the thickness of the current path are no higher than 10 nm.
2. The integrated circuit of claim 1 , wherein at least one dopant ion is randomly doped in the at least one current path and near the interface of the at least one first input/output end and the at least one current path.
3. The integrated circuit of claim 2 , wherein the at least one dopant ion is a negative ion.
4. The integrated circuit of claim 2 , wherein the at least one dopant ion is a positive ion.
5. The integrated circuit of claim 1 , wherein the length of the current path is at least three times longer than the width and the thickness of the current path.
6. The integrated circuit of claim 1 ,
wherein the at least one sense-amplifier senses an electric current from the at least one second input/output end and identify the threshold voltage according to one of the control end voltages,
wherein the processing circuit categorizes each threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and marks the state of each threshold voltages at an address in a mapping table.
7. The integrated circuit of claim 1 , wherein the at least one control end further covers the at least one current path.
8. The integrated circuit of claim 1 , wherein the at least one first input/output end, the at least one current path and the at least one second input/output end form a nano-wire, and the at least one control end further surrounds the nano-wire.
9. The integrated circuit of claim 1 , wherein the processing circuit records states of the threshold voltages in a mapping table, such that the mapping table fluctuates with respect to random-dopant fluctuation of the integrated circuit.
10. An integrated circuit, comprising:
at least one first input/output end;
at least one current path, connected with the first input/output end;
at least one control end, disposed above the at least one current path, configured to apply a plurality of control end voltages on the at least one current path;
at least one second input/output end, connected with the current path;
at least one sense-amplifier, connected with the at least one second input/output end, configured to sense an electric current from the at least one second input/output end and identify a threshold voltage according to one of the control end voltages; and
a processing circuit, configured to categorize each threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each threshold voltages at an address in a mapping table; and
wherein at least one current adjusting element is disposed in the at least one current path to adjust an electrical current,
wherein the at least one current adjusting element comprises at least one dopant ion, and at least either the width or the thickness of the current path are defined according to the de Broglie length (DBL), and the length of the current path is longer than the width of the current path,
wherein the width and the thickness of the current path are no higher than 10 nm.