IP Library Granted Patent US 9,000,583
Granted Patent B2
US 9,000,583 · App. 14/040,948 · Granted Apr 7, 2015

Multiple die in a face down package

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Quick Facts
Patent No.
US 9,000,583
App. No.
14/040,948
Granted
Apr 7, 2015
Kind
B2
Abstract

A microelectronic package includes a subassembly including a first substrate and first and second microelectronic elements having contact-bearing faces facing towards oppositely-facing first and second surfaces of the first substrate and each having contacts electrically connected with the first substrate. The contact-bearing faces of the first and second microelectronic elements at least partially overlie one another. Leads electrically connect the subassembly with a second substrate, at least portions of the leads being aligned with an aperture in the second substrate. The leads can include wire bonds extending through an aperture in the first substrate and joined to contacts of the first microelectronic element aligned with the first substrate aperture. In one example, the subassembly can be electrically connected with the second substrate using electrically conductive spacer elements.

Claims (10)

1. A microelectronic assembly, comprising:

a subassembly including:

a first microelectronic element including a semiconductor chip having a plurality of chip contacts at a front surface thereof, and an electrically conductive redistribution layer at the front surface contacting at least some of the chip contacts, the redistribution layer including redistribution contacts and electrically conductive traces extending along the front surface of the semiconductor chip between the chip contacts and the redistribution contacts;

a second microelectronic element including a second semiconductor chip having a plurality of chip contacts at a front surface thereof, and an electrically conductive redistribution layer at the front surface of the second semiconductor chip contacting at least some of the chip contacts of the second semiconductor chip, the redistribution layer of the second microelectronic element including redistribution contacts and electrically conductive traces extending along the front surface of the second semiconductor chip between the chip contacts of the second semiconductor chip and the redistribution contacts of the redistribution layer of the second microelectronic element, the redistribution contacts of the redistribution layer of the second microelectronic element facing the redistribution contacts of the redistribution layer of the first microelectronic element and being joined thereto; and

a substrate having first and second opposed surfaces, the first surface facing the subassembly, the second surface having terminals thereon for electrical interconnection with an external component; and

leads electrically interconnecting the subassembly with the substrate.

2. The microelectronic assembly of claim 1 , wherein the leads have portions aligned with an opening in the substrate.

3. The microelectronic assembly of claim 1 , wherein the leads include wire bonds extending from the first microelectronic element through an opening in the substrate.

4. The microelectronic assembly of claim 3 , wherein the wire bonds extend from contacts of the first microelectronic element disposed beyond an edge of the second microelectronic element.

5. The microelectronic assembly of claim 1 , wherein the leads include wire bonds extending from contacts at the front surface of the second microelectronic element about an edge of the second microelectronic element, the wire bonds joined to contacts at the first surface of the substrate.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2013
From: HABA, BELGACEM; ZOHNI, WAEL; CRISP, RICHARD DEWITT
To: TESSERA, INC.
Reel/Frame 031352/0625 →