Patent Assignment
Reel/Frame 042273/0813
Security Interest
Recorded: 2017-04-18
Pages: 33
Assignor
AVALANCHE TECHNOLOGY, INC.
Executed: 2017-04-13
Assignee
STRUCTURED ALPHA LP
65 QUEEN STREET WEST, SUITE 2400, TORONTO, ONTARIO, M5H 2M8, CANADA
Covered Properties
(255)
Spin-Transfer Torque Magnetic Random Access Memory (STTMRAM) With Enhanced Write Current
Perpendicular Magnetic Tunnel Junction (Pmtj) with in-Plane Magneto-Static Switching-Enhancing Layer
Omega-3 Fatty Acid Ester Compositions
Application:
15/132,278 →
Publication:
US US20160235853A1
Fast Programming of Magnetic Random Access Memory (Mram)
Method of Implementing Magnetic Random Access Memory (Mram) for Mobile System-on Chip Boot
Management of Memory Array with Magnetic Random Access Memory (Mram)
Magnetic Random Access Memory with Perpendicular Interfacial Anisotropy
Magnetic Random Access Memory with Perpendicular Enhancement Layer
Magnetic Memory Element with Composite Fixed Layer
Spin-Orbitronics Device and Applications Thereof
Three Dimensional Memory Arrays and Stitching Thereof
Patent:
9,627,438 →
Application:
15/141,726 →
Memory System Having Thermally Stable Perpendicular Magneto Tunnel Junction (Mtj) and a Method of Manufacturing Same
Magnetic Random Access Memory with Burst Access
Application:
13/235,294 →
Publication:
US US20130073790A1
Storage System Employing Mram and Array of Solid State Disks with Integrated Switch
High Availability Storage Appliance
SHARED PCIe END POINT SYSTEM INCLUDING A PCIe SWITCH AND METHOD FOR INITIALIZING THE SWITCH
Landing Pad in Peripheral Circuit for Magnetic Random Access Memory (MRAM)
Storage Processor Managing Solid State Disk Array
Storage System Redundant Array of Solid State Disk Array
Application:
14/678,777 →
Publication:
US US20150212752A1
METHOD AND APPARATUS FOR DE-DUPLICATION FOR SOLID STATE DISKs (SSDs)
Storage Processor Managing Nvme Logically Addressed Solid State Disk Array
Perpendicular Sttmram Device with Balanced Reference Layer
Application:
14/661,253 →
Publication:
US US20150194598A1
Multiple Die in a Face Down Package
Magnetic Memory Element with Composite Perpendicular Enhancement Layer
Method of Lun Management in a Solid State Disk Array
Software-Defined Ssd and System Using the Same
Application:
14/679,956 →
Publication:
US US20150378886A1
Storage System Controlling Addressing of Solid Storage Disks (Ssd)
Application:
14/679,823 →
Publication:
US US20150378884A1
Method and Apparatus to Reduce Power Consumption of Mobile and Portable Devices with Non-Volatile Memories
Application:
14/269,049 →
Publication:
US US20150316971A1
Multi-Level Scalable Switch Architecture for Storage Appliance
Application:
14/842,804 →
Publication:
US US20160085708A1
Magnetic Random Access Memory with Ultrathin Reference Layer
Magnetic Random Access Memory with Ultrathin Reference Layer
Reduction of Area and Power for Sense Amplifier in Memory
Application:
15/276,318 →
Publication:
US US20170091021A1
Multilayered Seed Structure for Perpendicular Mtj Memory Element
Memory Device Incorporating Selector Element with Multiple Thresholds
Patent:
9,812,499 →
Application:
15/221,505 →
Memory Device for Emulating Dynamic Random Access Memory (DRAM)
Serial Link Storage Interface (SLSI) Hybrid Block Storage
Application:
62/274,626 →
Serial Link Storage Interface (SLSI) Hybrid Block Storage
Management of Memory Array with Magnetic Random Access Memory (Mram)
Selector Device Incorporating Conductive Clusters for Memory Applications
Method for Sensing Memory Element Coupled to Selector Device
Programming of Non-Volatile Memory Subjected to High Temperature Exposure
Method and Apparatus for Adjustment of Current Through a Magnetoresistive Tunnel Junction (Mtj) Based on Temperature Fluctuations
Non-Uniform Switching Based Non-Volatile Magnetic Based Memory
Non-Uniform Switching Based Non-Volatile Magnetic Based Memory
Non-Uniform Switching Based Non-Volatile Magnetic Based Memory
High Capacity Low Cost Multi-State Magnetic Memory
High Capacity Low Cost Multi-State Magnetic Memory
High Capacity Low Cost Multi-State Magnetic Memory
High Capacity Low Cost Multi-State Magnetic Memory
Non-Volatile Perpendicular Magnetic Memory with Low Switching Current and High Thermal Stability
Non-Volatile Magnetic Memory with Low Switching Current and High Thermal Stability
Non-Volatile Magnetic Memory with Low Switching Current and High Thermal Stability
Non-Volatile Magnetic Memory with Low Switching Current and High Thermal Stability
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
Non-Volatile Magnetic Memory Element with Graded Layer
High Capacity Low Cost Multi-Stacked Cross-Line Magnetic Memory
Current-Confined Effect of Magnetic Nano-Current-Channel (Ncc) for Magnetic Random Access Memory (Mram)
Current-Confined Effect of Magnetic Nano-Current-Channel (Ncc) for Magnetic Random Access Memory (Mram)
High Capaciy Low Cost Multi-State Magnetic Memory
STTMRAM ELEMENT HAVING MULTIPLE PERPENDICULAR MTJs COUPLED IN SERIES
High Capacity Low Cost Multi-State Magnetic Memory
High Capaciy Low Cost Multi-State Magnetic Memory
Low Cost Multi-State Magnetic Memory
Low Cost Multi-State Magnetic Memory
Low Cost Multi-State Magnetic Memory
Low Resistance High-Tmr Magnetic Tunnel Junction and Process for Fabrication Thereof
Method for Manufacturing Non-Volatile Magnetic Memory Cell in Two Facilities
Method for Manufacturing Non-Volatile Magnetic Memory
Low Current Switching Magnetic Tunnel Junction Design for Magnetic Memory Using Domain Wall Motion
A Magnetic Memory with a Domain Wall
Low Current Switching Magnetic Tunnel Junction Design for Magnetic Memory Using Domain Wall Motion
Low Current Switching Magnetic Tunnel Junction Design for Magnetic Memory Using Domain Wall Motion
Magnetic Memory Write Circuitry
Magnetic Memory Sensing Circuit
Low-Cost Non-Volatile Flash-Ram Memory
Non-Volatile Flash-Ram Memory with Magnetic Memory
Hybrid Non-Volatile Memory Device
Low-Cost Non-Volatile Flash-Ram Memory
Low-Cost Non-Volatile Flash-Ram Memory
Method for Manufacturing High Density Non-Volatile Magnetic Memory
Magnetic Random Access Memory (MRAM) Manufacturing Process for a Small Magnetic Tunnel Junction (MTJ) Design with a Low Programming Current Requirement
Magnetic Random Access Memory (Mram) Manufacturing Process for a Small Magnetic Tunnel Junction (Mtj) Design with a Low Programming Current Requirement
Embedded Magnetic Random Access Memory (MRAM)
Embedded Magnetic Random Access Memory (Mram)
Embedded Magnetic Random Access Memory (Mram)
Embedded Magnetic Random Access Memory (Mram)
Flash Memory With Nano-Pillar Charge Trap
Patent:
8,687,418 →
Application:
12/623,369 →
Multi-State Spin-Torque Transfer Magnetic Random Access Memory
Spin-Transfer Torque Magnetic Random Access Memory Having Magnetic Tunnel Junction with Perpendicular Magnetic Anisotropy
Spin-Transfer Torque Magnetic Random Access Memory (STTMRAM) with Perpendicular Laminated Free layer
Patent:
8,982,616 →
Application:
13/685,650 →
Spin-Transfer Torque Magnetic Random Access Memory (STTMRAM) with Perpendicular Laminated Free Layer
Spin-Transfer Torque Magnetic Random Access Memory (Sttmram) with Laminated Free Layer
Patent:
8,374,025 →
Application:
12/779,881 →
Magnetic Random Access Memory with Field Compensating Layer and Multi-Level Cell
Magnetic Random Access Memory with Field Compensating Layer and Multi-Level Cell
Shared Transistor in a Spin-Torque Transfer Magnetic Random Access Memory (STTMRAM) Cell
Spin-Transfer Torque Magnetic Random Access Memory (Sttmram) Device with Shared Transistor and Minimal Written Data Disturbance
Method and Apparatus for Programming a Spin-Transfer Torque Magnetic Random Access Memory (STTMRAM) Array
Shared Transistor in a Spin-Torque Transfer Magnetic Random Access Memory (Sttmram) Cell
Low-Crystallization Temperature Mtj for Spin-Transfer Torque Magnetic Random Access Memory (Sttmram)
Spin-Transfer Torque Magnetic Random Access Memory (Sttmram) Using a Synthetic Free Layer
Low-Crystallization Temperature Mtj for Spin-Transfer Torque Magnetic Random Access Memory (Sttmram)
Patent:
8,169,821 →
Application:
12/907,913 →
Method and Apparatus for Writing to a Magnetic Tunnel Junction (Mtj) by Applying Incrementally Increasing Voltage Level
Method and Apparatus for Writing to a Magnetic Tunnel Junction (Mtj) by Applying Incrementally Increasing Voltage Level
Method and Apparatus for Programming a Magnetic Tunnel Junction (Mtj)
Spin Transfer Torque Magnetic Random Access Memory (Sttmram) Having Graded Synthetic Free Layer
Spin Transfer Torque Magnetic Random Access Memory (Sttmram) Having Graded Synthetic Free Layer
Emulation of Static Random Access Memory (Sram) by Magnetic Random Access Memory (Mram)
Emulation of Static Random Access Memory (Sram) by Magnetic Random Access Memory (Mram)
Method and Apparatus for Increasing the Reliability of an Access Transitor Coupled to a Magnetic Tunnel Junction (Mtj)
Method and Apparatus for Increasing the Reliability of an Access Transitor Coupled to a Magnetic Tunnel Junction (Mtj)
Method and Apparatus for Increasing the Reliability of an Access Transistor Coupled to a Magnetic Tunnel Junction (MTJ)
Method and Apparatus for Increasing the Reliability of an Access Transitor Coupled to a Magnetic Tunnel Junction (Mtj)
Spin-Transfer Torque Magnetic Random Access Memory with Perpendicular Magnetic Anisotropy Multilayers
Spin-Transfer Torque Magnetic Random Access Memory with Perpendicular Magnetic Anisotropy Multilayers
Spin-Transfer Torque Magnetic Random Access Memory with Perpendicular Magnetic Anisotropy Multilayers
Spin-Transfer Torque Magnetic Random Access Memory with Perpendicular Magnetic Anisotropy Multilayers
Spin-Transfer Torque Magnetic Random Access Memory with Multi-layered Storage Layer
Magnetic Random Access Memory (Mram) with Enhanced Magnetic Stiffness and Method of Making Same
Stt-Mram Mtj Manufacturing Method with in-Situ Annealing
Magnetic Random Access Memory (Mram) with Enhanced Magnetic Stiffness and Method of Making Same
Magnetic Random Access Memory (Mram) with Enhanced Magnetic Stiffness and Method of Making Same
Mtj Manufacturing Method Utilizing in-Situ Annealing and Etch Back
Magnetic Random Access Memory (Mram) with Enhanced Magnetic Stiffness and Method of Making Same
Access Transistor with a Buried Gate
Access Transistor with a Buried Gate
Vialess Memory Structure and Method of Manufacturing Same
Magnetic Tunnel Junction (Mtj) Formation Using Multiple Etching Processes
Magnetic Tunnel Junction (Mtj) Formation with Two-Step Process
Patent:
8,148,174 →
Application:
13/100,048 →
Method and Apparatus for Measuring Magnetic Parameters of Magnetic Thin Film Structures
Mapping of Random Defects in a Memory Device
Mapping of Random Defects in a Memory Device
PERPENDICULAR MAGNETIC TUNNEL JUNCTION (pMTJ) WITH IN-PLANE MAGNETO-STATIC SWITCHING-ENHANCING LAYER
Resistive Memory Device Having Vertical Transistors and Method for Making the Same
MRAM with sidewall protection and method of fabrication
Mram with Sidewall Protection and Method of Fabrication
Mram with Sidewall Protection and Method of Fabrication
High Speed Stt-Mram with Orthogonal Pinned Layer
Magnetic Random Access Memory with Switchable Switching Assist Layer
Magnetic Random Access Memory with Switching Assist Layer
Mram Etching Processes
Mram Etching Processes
Memory with on-Chip Error Correction
Memory with on-Chip Error Correction
Multi-Port Magnetic Random Access Memory (Mram)
Multi-Port Magnetic Random Access Memory (Mram)
Storage System Employing MRAM and Physically Addressed Solid State Disk
Computer System with Physically-Addressable Solid State Disk (Ssd) and a Method of Addressing the Same
Physically Addressed Solid State Disk Employing Magnetic Random Access Memory (MRAM)
Magnetic Random Access Memory with Dynamic Random Access Memory (Dram)-Like Interface
Magnetic Random Access Memory with Dynamic Random Access Memory (Dram)-Like Interface
Initialization Method of a Perpendicular Magnetic Random Access Memory (Mram) Device
Initialization Method of a Perpendicular Magnetic Random Access Memory (Mram) Device
Perpendicular Magnetic Random Access Memory (Mram) Device with a Stable Reference Cell
Perpendicular Magnetic Random Access Memory (Mram) Device with a Stable Reference Cell
Initialization Method of a Perpendicular Magnetic Random Access Memory (Mram) Device with a Stable Reference Cell
Perpendicular Magnetic Random Access Memory (Mram) Device with Reference Cell and Method for Using Same
Method for Magnetic Screening of Arrays of Magnetic Memories
Method for Magnetic Screening of Arrays of Magnetic Memories
Method for Screening Arrays of Magnetic Memories
Mobile Device Using Secure Spin Torque Transfer Magnetic Random Access Memory (Sttmram)
Secure Spin Torque Transfer Magnetic Random Access Memory (Sttmram)
Secure Spin Torque Transfer Magnetic Random Access Memory (Sttmram)
Memory Device Including Transistor Array with Shared Plate Channel and Method for Making the Same
Memory Device Having Vertical Selection Transistors with Shared Channel Structure and Method for Making the Same
Method of Reading from and Writing to Magnetic Random Access Memory (Mram)
Differntial Magnetic Random Access Memory (Mram)
Patent:
8,385,108 →
Application:
13/429,293 →
Fast Programming of Magnetic Random Access Memory (Mram)
Fast Programming of Magnetic Random Access Memory (Mram)
Fast Programming of Magnetic Random Access Memory (Mram)
Patent:
8,792,269 →
Application:
13/842,747 →
Mtj Mram with Stud Patterning
Magnetoresistive Logic Cell and Method of Use
Magnetoresistive Logic Cell and Method of Use
Redeposition Control in MRAM Fabrication Process
Mram Fabrication Method with Sidewall Cleaning
Method for Bit-Error Rate Testing of Resistance-based RAM Cells Using a Reflected Signal
Method of Sensing Data of a Magnetic Random Access Memories (Mram)
Memory Device Having Stitched Arrays of 4 F² Memory Cells
Memory Device Having Stitched Arrays of 4 F² Memory Celly
Memory Device Having Stitched Arrays of 4 F² Memory Celln
High Density Resistive Memory Having a Vertical Dual Channel Transistor
Magnetic Tunnel Junction With Non-Metallic Layer Adjacent to Free Layer
Persistent Block Storage Attached to Memory Bus
Persistent Block Storage Attached to Memory Bus
Patent:
8,677,097 →
Application:
13/654,361 →
Devices and Methods for Measurement of Magnetic Characteristics of Mram Wafers Using Magnetoresistive Test Strips
Shields for Magnetic Memory Chip Packages
Method and Apparatus for Sensing the State of a Magnetic Tunnel Junction (Mtj)
Method and Apparatus for Reading a Magnetic Tunnel Junction Using a Sequence of Short Pulses
Method and Apparatus for Reading a Magnetic Tunnel Junction Using a Sequence of Short Pulses
Method and Apparatus for Reading a Magnetic Tunnel Junction Using a Sequence of Short Pulses
Patent:
8,693,240 →
Application:
13/688,066 →
Host-Managed Logical Mass Storage Device Using Magnetic Random Access Memory (Mram)
Patent:
8,670,276 →
Application:
13/945,362 →
HOST-MANAGED Logical MASS STORAGE DEVICE USING MAGNETIC RANDOM ACCESS MEMORY (MRAM)
Host-Managed Logical Mass Storage Device Using Magnetic Random Access Memory (Mram)
Host-Managed Logical Mass Storage Device Using Magnetic Random Access Memory (Mram)
Patent:
8,547,745 →
Application:
13/679,739 →
Management of Memory Array with Magnetic Random Access Memory (Mram)
Patent:
8,711,631 →
Application:
13/902,650 →
Management of Memory Array with Magnetic Random Access Memory (Mram)
Controller Management of Memory Array of Storage Device Using Magnetic Random Access Memory (Mram)
Controller Management of Memory Array of Storage Device Using Magnetic Random Access Memory (Mram)
Controller Management of Memory Array of Storage Device Using Magnetic Random Access Memory (Mram) in a Mobile Device
Controller Management of Memory Array of Storage Device Using Magnetic Random Access Memory (Mram)
Patent:
8,526,234 →
Application:
13/708,582 →
Mtj Stack and Bottom Electrode Patterning Process with Ion Beam Etching Using a Single Mask
Electric Field Assisted Mram and Method for Using the Same
Fabrication Method for High-Density Mram Using Thin Hard Mask
Non-Volatile Storage Module Having Magnetic Random Access Memory (Mram) with a Buffer Window
Patent:
8,719,492 →
Application:
13/958,207 →
Non-Volatile Storage Module Having Magnetic Random Access Memory (Mram) with a Buffer Window
Non-Volatile Block Storage Module Using Magnetic Random Access Memory (Mram)
Patent:
8,595,427 →
Application:
13/791,452 →
Magnetoresistive Layer Structure with Voltage-Induced Switching and Logic Cell Application
Storage System Employing Mram and Array of Solid State Disks with Integrated Switch
Method for Reducing Effective Raw Bit Error Rate in Multi-Level Cell NAND Flash Memory
Flash Subsystem Organized into Pairs of Upper and Lower Page Locations
Method for Reducing Effective Raw Bit Error Rate in Multi-Level Cell Nand Flash Memor
Patent:
8,656,255 →
Application:
13/840,327 →
Storage System Employing MRAM and Redundant Array of Solid State Disk
A SHARED PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) END POINT SYSTEM WITH A PCIe SWITCH AND METHOD FOR INITIALIZING THE SAME
Multi Root Shared Peripheral Component Interconnect Express (Pcie) End Point
Patent:
8,806,098 →
Application:
13/856,395 →
Bottom-Type Perpendicular Magnetic Tunnel Junction (Pmtj) Element with Thermally Stable Amorphous Blocking Layers
Patent:
8,836,000 →
Application:
13/891,833 →
Method of Sensing Data in Magnetic Random Access Memory with Overlap of High and Low Resistance Distributions
Patent:
8,891,326 →
Application:
14/024,580 →
Landing Pad in Peripheral Circuit for Magnetic Random Access Memory (Mram)
Storage Processor Managing Solid State Disk Array
Patent:
8,954,657 →
Application:
14/040,280 →
Method of Manufacturing Magnetic Tunnel Junction Memory Element
Patent:
8,962,349 →
Application:
14/089,209 →
Multi-Level Cells and Method for Using the Same
Method for Reading and Writing Multi-Level Cells
Patent:
8,724,380 →
Application:
14/079,518 →
Storage Processor Managing Nvme Logically Addressed Solid State Disk Array
Patent:
8,966,164 →
Application:
14/050,274 →
Perpendicular Sttmram Device with Balanced Reference Layer
Magnetic Random Access Memory Having Perpendicular Enhancement Layer and Interfacial Anisotropic Free Layer
Magnetic Tunnel Junction with Perpendicular Enhancement Layer and Thin Reference Layer
Magnetic Random Access Memory Element Having Tantalum Perpendicular Enhancement Layer
Magnetic Random Access Memory Having Perpendicular Composite Reference Layer
Magnetic Random Access Memory with Perpendicular Interfacial Anisotropy
Magnetic Random Access Memory with Perpendicular Enhancement Layer
Magnetic Random Access Memory with Perpendicular Enhancement Layer
Magnetic Random Access Memory with Tri-layer Reference Layer
Magnetic Tunnel Junction (Mtj) Memory Element Having Tri-Layer Perpendicular Reference Layer
Magnetic Random Access Memory Having Perpendicular Enhancement Layer
Storage Processor Managing Solid State Disk Array
Method of Lun Management in a Solid State Disk Array
Patent:
8,954,658 →
Application:
14/090,910 →
Method for Forming Mtj Memory Element
Patent:
8,975,089 →
Application:
14/082,400 →
Apparatus for Initializing Perpendicular Mram Device
Voltage-Switched Magnetic Random Access Memory (Mram) and Method for Using the Same
Magnetic Random Access Memory with Multilayered Seed Structure
Magnetic Random Access Memory with Nickel/Transition Metal Multilayered Seed Structure
Magnetic Random Access Memory with Multilayered Seed Structure
Magnetic Random Access Memory with Multiple Free Layers
Patent:
9,166,143 →
Application:
14/304,775 →
Semiconductor Memory Device Having Increased Separation Between Memory Elements
Patent:
9,123,575 →
Application:
14/336,640 →
Three-Dimensional Flash Memory Device
Patent:
9,112,051 →
Application:
14/451,252 →
Unipolar-Switching Perpendicular Mram and Method for Using Same
Perpendicular MRAM with Magnet
Memory Device with Increased Separation Between Memory Elements
Patent:
9,548,448 →
Application:
14/939,229 →
Method and Apparatus for Adjustment of Current Through a Magnetoresistive Tunnel Junction (Mtj) Based on Temperature Fluctuations
Related Assignments
(21)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 26, 2013
From: LE, NGON VAN; TADEPALLI, RAVISHANKAR
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 031683/0053 →
Assignment of Assignor's Interest
Apr 18, 2014
From: GAN, HUADONG; ZHOU, YUCHEN; HUAI, YIMING; WANG, ZIHUI
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 032711/0383 →
Assignment of Assignor's Interest
Oct 27, 2014
From: ZHOU, YUCHEN; ABEDIFARD, EBRAHIM; MOZAFFARI, MAHMOOD
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 034044/0419 →
Assignment of Assignor's Interest
Aug 20, 2015
From: WANG, XIAOBIN; KESHTBOD, PARVIZ; SATOH, KIMIHIRO; WANG, ZIHUI
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 036385/0892 →
Assignment of Assignor's Interest
Sep 21, 2015
From: WANG, ZIHUI; GAN, HUADONG; HUAI, YIMING; ZHOU, YUCHEN
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 036610/0080 →
Assignment of Assignor's Interest
Nov 2, 2015
From: ZHANG, JING; HUAI, YIMING; RANJAN, RAJIV YADAV; ZHOU, YUCHEN
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 036940/0970 →
Assignment of Assignor's Interest
Nov 4, 2015
From: NEMAZIE, SIAMACK
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 036957/0508 →
Assignment of Assignor's Interest
Nov 20, 2015
From: MANDAPURAM, ANILKUMAR; NEMAZIE, SIAMACK
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 037107/0623 →
Assignment of Assignor's Interest
Mar 24, 2016
From: GAN, HUADONG; HUAI, YIMING; WANG, ZIHUI; ZHOU, YUCHEN
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 038096/0731 →
Assignment of Assignor's Interest
Apr 28, 2016
From: SATOH, KIMIHIRO; YEN, BING K
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 038415/0362 →
Assignment of Assignor's Interest
May 19, 2016
From: SATOH, KIMIHIRO; HUAI, YIMING
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 038645/0237 →
Assignment of Assignor's Interest
Jan 26, 2017
From: ABEDIFARD, EBRAHIM; KESHTBOD, PARVIZ
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 041098/0201 →
Security Interest
Apr 17, 2017
From: SANCILIO PHARMACEUTICALS COMPANY, INC.; SANCILIO & COMPANY, INC.; BLUE PALM ADVERTISING AGENCY, LLC
To: MIDCAP FINANCIAL TRUST, AS AGENT
Reel/Frame 042025/0173 →
Corrective Assignment to Correct the Incorrect Appl. No. 14/240,867 Previously Recorded at Reel: 042025 Frame: 0173. Assignor(S) Hereby Confirms the Security Interest.
Aug 4, 2017
From: SANCILIO PHARMACEUTICALS COMPANY, INC.; SANCILIO & COMPANY, INC.; BLUE PALM ADVERTISING AGENCY, LLC
To: MIDCAP FINANCIAL TRUST, AS AGENT
Reel/Frame 043444/0301 →
Security Interest
Jun 7, 2018
From: SANCILIO PHARMACEUTICALS COMPANY, INC.; SANCILIO & COMPANY, INC.; BLUE PALM ADVERTISING AGENCY, LLC
To: MIDCAP FUNDING IV TRUST, AS AGENT
Reel/Frame 046010/0234 →
Security Interest
Jun 20, 2019
From: MICELLE BIOPHARMA, INC.
To: PINNACLE BANK
Reel/Frame 049540/0808 →
Security Interest
Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
Security Interest
Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
Security Interest
Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
Security Interest
Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
Security Interest
Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →