IP Library Granted Patent US 8,120,949
Granted Patent B2
US 8,120,949 · App. 12/182,996 · Granted Feb 21, 2012

Low-cost non-volatile flash-RAM memory

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Quick Facts
Patent No.
US 8,120,949
App. No.
12/182,996
Granted
Feb 21, 2012
Kind
B2
Abstract

A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Claims (28)

1. A flash-RAM memory comprising:

a non-volatile random access memory (RAM) including an array of magnetic memory cells and organized into at least two stacks of magnetic memory cells, each stack separated from another stack by a dielectric layer, the non-volatile RAM formed on a monolithic die, each of the magnetic memory cells of the non-volatile RAM including a magnetic tunnel junction (MTJ) made of a pinning layer on top of which is formed a fixed layer, on top of which is formed a tunnel layer, on top of which is formed a free layer;

a non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory being made of non-magnetic memory, the non-volatile page-mode memory and the non-volatile RAM residing on the same monolithic die, the non-volatile page-mode memory being operative to store data for reading; and

a plurality of transistors, isolated in a silicon area of the monolithic die, that is shared by the non-volatile RAM and the non-volatile page-mode memory, a single transistor of the plurality of transistors used to access a magnetic memory cell of the flash-RAM and a single transistor of the plurality of transistors used to access a page of the non-volatile page-mode memory,

wherein data is read, written and erased a page at a time to the non-volatile page-mode memory, with a page comprising a plurality of bits, whereas, the non-volatile pare-mode memory is written to and read from one bit at a time.

2. A flash-RAM memory, as recited in claim 1 , wherein said non-volatile page-mode memory includes non-volatile magnetic memory made of an array of magnetic memory cells, each magnetic memory cells being made of a magnetic tunnel junction (MTJ).

3. The flash-RAM memory, as recited in claim 2 , wherein at least one of the memory cells includes a diode formed on top of the MTJ, the diode being magnetic and made of an isolation layer on top of which is formed a silicon seeding layer, one or more Si-doped layers being formed on top of the silicon seeding layer and a barrier tunneling layer formed on top of the one or more Si-doped layers and a metallic magnetic layer formed on top of the barrier tunneling layer.

4. The flash-RAM memory, as recited in claim 2 , wherein at least one of the memory cells includes a zener diode.

5. A computer system comprising:

a host; and

flash-RAM coupled to the host configured to store data, the flash-RAM including,

non-volatile random access memory (RAM) formed on a monolithic die that includes a silicon area, the non-volatile RAM including an array of magnetic memory cells and organized into at least two stacks of magnetic memory cells, each stack separated from another stack by a dielectric layer, the non-volatile RAM including a magnetic tunnel junction (MTJ) made of a pinning layer on top of which is formed a fixed layer, on top of which is formed a tunnel layer, on top of which is formed a free layer; and

non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory being made of non-magnetic memory, the non-volatile page-mode memory and the non-volatile RAM residing on the monolithic die, each of the non-volatile RAM and the non-volatile page-mode memory including magnetic memory cells made of a MTJ, the magnetic memory formed on the monolithic die, the non-volatile page-mode memory being operative to store data for reading thereof, wherein data is read, written and erased a page at a time, with a page comprising a plurality of bits, the non-volatile page-mode memory being addressed a page at a time whereas the flash-RAM being addressed a bit at a time, a page including more than one bit; and

a plurality of transistors coupled to the flash-RAM and the non-volatile page-mode memory and formed on an isolated part of the silicon area of the monolithic die thereby avoiding physical contact with the monolithic die, a single transistor of the plurality of transistors used to access a magnetic memory cell of the flash-RAM and a single transistor of the plurality of transistors used to access a page of the non-volatile page-mode memory.

6. A computer system as recited in claim 5 wherein the magnetic memory cells further include a thin-film diode coupled to the MTJ.

7. A computer system as recited in claim 5 , wherein at least one of the magnetic memory cells includes a diode.

8. A computer system as recited in claim 5 , wherein at least one of the magnetic memory cells includes a zener diode.

9. A computer system as recited in claim 5 , wherein the flash-RAM is used to store boot code.

10. A computer system as recited in claim 5 , wherein the flash-RAM is used to provide an instant-on system image of the hard disk drive, save data in case of a power-outage, and the like.

11. A computer system as recited in claim 5 , wherein the flash-RAM is used to save data in case of a power-outage.

12. A computer system as recited in claim 5 , wherein the memory elements comprise a one-time programmable memory.

13. A flash-RAM memory, as recited in claim 1 , wherein the free layer has a magnetization orientation that is in-plane relative to that of the monolithic die and switchable relative to the fixed layer.

14. A flash-RAM memory, as recited in claim 1 , wherein the free layer has a magnetization orientation that is perpendicular relative to that of the monolithic die and switchable relative to the fixed layer.

15. A flash-RAM memory, as recited in claim 1 , further including magnetic shielding layers inter-dispersed between the magnetic memory cells.

16. A flash-RAM memory, as recited in claim 15 , wherein the magnetic shielding layers are made of Conetic allow comprising Ni—Fe—Cu—Mo.

17. A flash-RAM memory, as recited in claim 1 , wherein the dielectric layer is made of oxides or nitrides.

18. A flash-RAM memory, as recited in claim 5 , further including magnetic shielding layers inter-dispersed between the magnetic memory cells.

19. A flash-RAM memory, as recited in claim 18 , wherein the magnetic shielding layers are made of Conetic allow comprising Ni—Fe—Cu—Mo.

Assignments (8)
SECURITY INTEREST Recorded Mar 18, 2022
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 059436/0203 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057213/0050 →
SECURITY INTEREST Recorded Apr 19, 2021
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 057217/0674 →
SECURITY INTEREST Recorded Jul 8, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 053156/0223 →
SECURITY INTEREST Recorded Feb 13, 2020
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 051930/0396 →
SECURITY INTEREST Recorded Apr 18, 2017
From: AVALANCHE TECHNOLOGY, INC.
To: STRUCTURED ALPHA LP
Reel/Frame 042273/0813 →
CHANGE OF NAME Recorded Apr 20, 2010
From: YADAV TECHNOLOGY, INC.
To: AVALANCHE TECHNOLOGY, INC.
Reel/Frame 024258/0835 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2008
From: RANJAN, RAJIV YADAV; KESHTBOD, PARVIZ; ASSAR, MAHMUD
To: YADAV TECHNOLOGY INC.
Reel/Frame 021765/0037 →